High-Level Synthesis of In-Circuit Assertions for Verification, Debugging, and Timing Analysis

Algorithm 1

In-circuit verification example.

1 co_unit64 c2, c1;

2 co_int32 address, array[20], out;

3 c2 = 4294967286; c1 = 4294967296;

4 if (c2 > c1) address = c2 – c1;

5 else address = 0;

6 assert(address >= 0);

7 out = user(address);

8 assert((30 > out) && (out > 20));

9 array[address] = out;