AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC : Table 3

Table 3: Example of possible combinations of task allocations within the execution platform when considering that the processor can be in a low-power mode when no software task is executed. In this case, the power consumption of the processor is equal to 0.


Conf.	Task allocation		Software execution		Hardware execution			Global	Global without
	Soft	Hard	Exec Time	Energy	Area	Exec Time	Energy	Exec Time	Low-power mode
	Soft	Hard	Exec Time	Energy	Area	Exec Time	Energy	Exec Time	Energy	Av. power
			(tu)	(eu)	(cle)	(tu)	(eu)	(tu)	(eu)	(pu)

Conf₁	, ,	—	110	11000	0	0	0	110	11000	100
Conf₂	,		50	5000	50000	20	5000	50	10000	200
Conf₃	,		80	8000	40000	12	1800	80	9800	122
Conf₄	,		90	9000	30000	10	1000	90	10000	111
Conf₅		,	20	2000	90000	20	6800	20	8800	440
Conf₆		,	30	3000	80000	20	6000	30	9000	300
Conf₇		,	60	6000	70000	12	2800	60	8800	147
Conf₈	—	, ,	0	0	120000	20	7800	20	7800	390