A Security Scheme for Dependable Key Insertion in Mobile Embedded Devices

Table 7

FPGA resources.

Slices	1.791 of 4.656 (38%)
Slices: FlipFlops uses	1.590 of 9.312 (17%)
Slices: LUTs used	1.941 of 9.312 (20%)
BlockRAMs used	16 of 20 (80%)
Equivalent logic cells	1.135.468
Minimal clock period	18,777 ns
Maximum clock frequency	53,257 MHz