Journals
Publish with us
Publishing partnerships
About us
Blog
International Journal of Reconfigurable Computing
Journal overview
For authors
For reviewers
For editors
Table of Contents
Special Issues
International Journal of Reconfigurable Computing
/
2011
/
Article
/
Fig 20
/
Research Article
A Self-Checking Hardware Journal for a Fault-Tolerant Processor Architecture
Figure 20
Error patterns for fault injection.
(a)
Random SEU
(b)
Random MBU (1or 2-bits)
(c)
Random MBU (1, 2 or 3-bits)
(d)
Random MBU (1, 2, …, 7 or 8 bits)