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Journal of Electrical and Computer Engineering
Volume 2012 (2012), Article ID 509465, 15 pages
http://dx.doi.org/10.1155/2012/509465
Review Article

Networks on Chips: Structure and Design Methodologies

1Graduate Institute of Electronics Engineering, National Taiwan University, Taipei 106, Taiwan
2Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, WI 53706-1691, USA
3Department of Electrical Engineering and Graduate Institute of Electronics Enginering, National Taiwan University, Taipei 106, Taiwan

Received 18 September 2011; Accepted 1 October 2011

Academic Editor: Jiang Xu

Copyright © 2012 Wen-Chung Tsai et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Wen-Chung Tsai, Ying-Cherng Lan, Yu-Hen Hu, and Sao-Jie Chen, “Networks on Chips: Structure and Design Methodologies,” Journal of Electrical and Computer Engineering, vol. 2012, Article ID 509465, 15 pages, 2012. doi:10.1155/2012/509465