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VLSI Design
Volume 13 (2001), Issue 1-4, Pages 193-198
http://dx.doi.org/10.1155/2001/29174

Design Optimization of Coulomb Blockade Devices

Hitachi Cambridge Laboratory, Cavendish Laboratory, Madingley Road, Cambridge CB3 0HE, UK

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

We investigate the design of a Coulomb blockade device consisting of a rectangular array of quantum dots or ultrasmall metallic islands with regard to its stability against geometric size disorder and offset charges. To simulate the device operation we perform a statistical analysis of the Coulomb blockade voltage which results in practical design rules.