About this Journal Submit a Manuscript Table of Contents
VLSI Design
Volume 12 (2001), Issue 2, Pages 275-300
http://dx.doi.org/10.1155/2001/39405

Integrated Area-power Optimal State Assignment

Department of Electrical and Computer Engineering, Coover Hall, Iowa State University, Ames 50011-3060, IA, USA

Received 20 June 2000; Revised 3 August 2000

Copyright © 2001 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

This paper presents a state assignment algorithm with the objective of lower energy along with area comparable to the area-targeting state assignments such as JEDI. The underlying framework is MUSTANG's complete weighted graph with weights representing state affinity. The weight computation phase estimates the computation energy of potential common cubes using steady state probabilities for transitions. The weight computation phase also identifies a large set of potential state cliques, which are incorporated into a recursive bipartitioning based state assignment procedure. Reuse of cliques identified by the weight computation phase results in a faster and efficient state assignment. The energy targeting weights result in ≈9% lower area and 18% lower power than area targeting weights in JEDI over 29 MCNC Logic Synthesis ‘93 benchmarks. The clique based state assignment performs almost as well as the annealing based state assignment in JEDI, and takes only about half as much time.