A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design

Figure 3

(a) A 3-sided switching network PSN(𝑛,𝑚,𝑠_𝑝,𝑠_𝑜,𝑠_𝑖) with 𝑛=2, 𝑚=2, 𝑠_𝑝=2, 𝑠_𝑜=2, and 𝑠_𝑖=4. (b) The connecting instance in a CB_𝑖(𝑛,𝑚).

(a)

(b)