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Journal of Electrical and Computer Engineering
Volume 2013 (2013), Article ID 189436, 10 pages
Novel Complete Probabilistic Models of Random Variation in High Frequency Performance of Nanoscale MOSFET
Department of Computer Engineering, Siam University, 38 Petchkasem Road, Bangkok 10160, Thailand
Received 27 September 2012; Revised 30 January 2013; Accepted 31 January 2013
Academic Editor: Jan Van der Spiegel
Copyright © 2013 Rawid Banchuin. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
The novel probabilistic models of the random variations in nanoscale MOSFET's high frequency performance defined in terms of gate capacitance and transition frequency have been proposed. As the transition frequency variation has also been considered, the proposed models are considered as complete unlike the previous one which take only the gate capacitance variation into account. The proposed models have been found to be both analytic and physical level oriented as they are the precise mathematical expressions in terms of physical parameters. Since the up-to-date model of variation in MOSFET's characteristic induced by physical level fluctuation has been used, part of the proposed models for gate capacitance is more accurate and physical level oriented than its predecessor. The proposed models have been verified based on the 65 nm CMOS technology by using the Monte-Carlo SPICE simulations of benchmark circuits and Kolmogorov-Smirnov tests as highly accurate since they fit the Monte-Carlo-based analysis results with 99% confidence. Hence, these novel models have been found to be versatile for the statistical/variability aware analysis/design of nanoscale MOSFET-based analog/mixed signal circuits and systems.
Nanoscale MOSFET has been adopted in many recently proposed analog/mixed signal circuits and systems such as high speed amplifier [1–3], millimeter wave components [4–6], and analog-to-digital converter [7–9]. Of course, the high frequency performances of these circuits and systems can be determined by those of their intrinsic MOSFET which can be defined by two major MOSFET’s parameters, entitled gate capacitance, , and transition frequency, .
Obviously, imperfection in MOSFET’s properties at the physical level, for example, random dopant fluctuation, line edge roughness, and so forth, causes the fluctuations in many of its characteristics such as threshold voltage, , channel width, , and channel length, , which in turn yields the random variations in its circuit level parameters, for example, drain current, , transconductance, , and so forth. These variations are crucial in the statistical/variability aware design of MOSFET-based analog/mixed signal circuits and systems particularly at the nanometer regimes since their magnitudes become relatively large percentages. Hence, there are many previous researches on analytical modeling of such variations, for example, [10–13] and so forth, on which the nanoscale CMOS technology has been focused. However, they did not mention anything about variations in and even though they also exist and greatly affect the high frequency performances of the MOSFET-based circuits and systems. For these variations, results of studies as graphical plots and numerical measurements have been reported in previous articles, for example, [14–16] and so forth. In , the relationship between the variance of and that of has been derived. Unfortunately, formulation of each of these variations has not been mentioned. Later, the physical level oriented analytical model of random variation in has been originally proposed in . However, this model has been derived based on the classical model of physical level fluctuation-induced MOSFET’s characteristic variation  which is being replaced by its more up-to-date successors such as that in . Furthermore, the model in  is incomplete since the modeling on which is as important as has not been performed. To the knowledge of the author, such modeling on has never been performed.
Hence, the novel probabilistic models of the random variations in nanoscale MOSFET’s high frequency performances have been proposed in this paper. Beside the variation in , that in has also been focused on. So, these models are complete. Both random dopant fluctuation and process variation effects such as line edge roughness, which are the major causes of the random variations in the MOSFET’s high frequency characteristics , have been taken into account. The nanoscale MOSFET equation  has been used as the mathematical basis similarly to [11, 12, 18]. As the precise mathematical expressions in terms of physical parameters, these models have been found to be both analytic and physical level oriented. Unlike , the state of the art physical level fluctuation-induced characteristic variation model of MOSFET  has been adopted instead of the classical one . As a result, part of the models for variation in is more accurate and physical level oriented than its predecessor . These novel models have been verified based on the 65 nm CMOS process technology by using the Monte-Carlo SPICE simulations of the benchmark circuits and the Kolmogorov-Smirnov goodness of fit tests as very accurate since they fit the results obtained from Monte-Carlo SPICE simulations with 99% confidence. So, they have been found to be the versatile for the statistical/variability aware analysis/design of nanoscale MOSFET-based analog/mixed signal circuits and systems.
2. The Proposed Models
In this section, the proposed models will be presented. Before proceeding further, it is worthy to give some foundation on the nanoscale MOSFET’s equation. It can be seen from  that of the nanoscale MOSFET can be given with the gate oxide capacitance expressed in term of gate oxide permittivity and thickness as where and denote the saturation velocity  and gate to source voltage. So, of the nanoscale MOSFET is given by using (1) as follows:
where denotes the gate charge  which can be determined as a function of by using the approach adopted from  as where and denote the coulomb scattering coefficient and the maximum bulk charge, respectively.
By taking random dopant fluctuation and process variation effects into account, fluctuations in , , , and so forth, denoted by , , , and so on, existed which yield random variations in and denoted by and , respectively. This can be stated alternatively that and are functions of , , , and so forth. With this in mind, and can be mathematically defined as
where and denoted the fluctuated and as functions of , , , and so on which are distributed in the Gaussian fashion. By using (6), (7), and (8), and can be given in terms of physical level variables as follows:
where , , and denote flat band voltage, fluctuated threshold voltage, and half of surface band bending at inversion, respectively. Like other variations, denotes random variation in . The summation of and approximates the threshold voltage which its fluctuation is the dominant one. It can be seen that the deterministic behaviors of and can be analytically modeled by using (9).
For the probabilistic modeling of our interested the probability density functions of and , denoted by and , where and stand for any sampled value of and that of , respectively, must be derived. In order to do so, the up-to-date model of physical level fluctuations-induced variation in MOSFET’s characteristic  has been adopted. At this point, and can be, respectively, derived by using (9) and the basis model as in (10) and (11), where and denote effective doping concentration and depletion region width, respectively .
Finally, the novel complete probabilistic models of the random variations in nanoscale MOSFET’s high frequency performances have been now derived. By using these models and conventional statistical mathematics, the probabilistic/statistical behaviors of , and even variations in other nanoscale MOSFET’s high frequency parameters can be analytically explained in terms of related physical level variables. These models can be the mathematical tool for the statistical/variability aware optimization of MOSFET’s high frequency performance and computer aid sensitivity analysis-based variability aware simulations of any circuit/system’s high frequency parameters. The required computational effort has been found to be lower than that of the traditional Monte-Carlo analysis based on variation of MOSFET’s characteristic which is time expensive . Even though these models are oriented to variations in a single device, they can also be the modeling basis of mismatches in high frequency performances between transistors. These points will be discussed later.
The models proposed in this paper, that is, and shown in (10) and (11), respectively, are more precise as they are the probability density functions in terms of physical level parameters such as , , and .
The models proposed in this research are more up-to-date and complete because they are derived based on newer basis model , and the previously overlooked has now been modeled as in (11). Moreover, in (10) is more physical level oriented than its predecessor  as shown above since it contains additional physical level variables such as , , and . The proposed is more accurate than its predecessor as can be seen from its better goodness of fit test results shown in the upcoming section in which verification of both and will be given. Hence, these novel models have been found to be the potential mathematical tool for the variability aware analysis/design of various MOSFET-based analog/mixed signal circuits and systems at the nanometer regime.
3. The Verification
Verification of the proposed models has been performed in both qualitative and quantitative aspects. In the qualitative sense, and have been graphically compared with probability distributions of and obtained from the Monte-Carlo SPICE simulations of the benchmark circuits affected by normally distributed fluctuations in characteristics of MOSFET such as , , and . For verification in the quantitative manner, goodness of fit tests have been performed to and . Since it has been suspected that and are normally distributed via observation of the proposed models, the appropriate goodness of fit test has been found to KS test Here, overview of the KS test and its application to this research will be given. Strategy of the KS test is to performed the comparison of the K-S test statistic (KS) and the critical value () where it can be stated that any model fits its target data set if and only if its KS does not exceed its [25, 26]. For this research, KS can be defined as
where can be either or so can be either or . As a result, which represents the cumulative distribution function of any can be either for and or for and . Obviously, can be obtained by using as shown in (15) whereas can be derived by using as in (16). Note that denotes the error function which can be mathematically defined for arbitrary variable as .
On the other hand, denotes the benchmark cumulative distribution function of any which can be either or , calculated by integration of its corresponding probability distribution obtained from simulations of benchmark circuits. Since the confidence level of the test is 99%, can be given by (17), where denotes the number of runs of Monte-Carlo SPICE analysis, which is chosen to be 3000 for this research. As a result, .
At this point, other issues such as verification basis, benchmark circuits, and simulation methodologies will be mentioned. As the nanoscale MOSFET is focused, the 65 nm CMOS process technology has been adopted as the verification basis. Similar to , parameterization of the proposed models has been performed by using the 65 nm CMOS process parameters, and the BSIM4-based benchmark circuits at 65 nm level with all necessary parameters extracted by Predictive Technology Model (PTM)  have been used. Of course, both NMOS and PMOS technologies have been considered.
In order to verify the accuracy of , the benchmark circuit and methodology used in  can be adopted. The core of this circuit for NMOS technological basis can be depicted in Figure 1, and can be found as 
where , , and denote the input admittance, input current, and input voltage of the benchmark circuit, respectively. Similar to , the Monte-Carlo SPICE simulation of this circuit gives the benchmark probability distribution of for verification of based on NMOS technology. For PMOS technology, the similar circuit with the NMOS device replaced with PMOS one and the similar methodology can be used as done in .
For verifying , core of the benchmark circuit can be depicted in Figure 2 for NMOS-based verification. From this circuit, can be defined as the frequency in which the current gain is unity; that is, the magnitude of the small signal input current, is equal to that of the output one, . Of course, the Monte-Carlo SPICE simulation of this circuit gives the benchmark probability distribution of for verification of based on NMOS technology. Of course, the similar circuit with the NMOS device replaced with PMOS one and the similar methodology can be used for PMOS technology-based verification. It should be mentioned here that all circuits operate under 1 V. supply voltage with nm which is closed to the minimum allowable one, and μm. In the upcoming subsections, NMOS technology-based verification and PMOS-based one will be, respectively given; then it will be shown that is more accurate than its predecessor.
3.1. NMOS-Based Verification
The graphical comparisons of the probability distributions are depicted in Figures 3 and 4 for verification in the qualitative sense of and that of , respectively. The horizontal axes are labeled by / and which display the amounts of and as percentages of nominal and nominal . A strong agreement between and its benchmark obtained from the Monte-Carlo simulation along with that between and its benchmark has been found. Furthermore, normal distributions of variations high frequency performances as predicted by the proposed models have been observed.
In the quantitative point of view, it can be seen that the resulting KS from the test of can be found as , and that from the test of is . These statistics do not exceed . This means that the proposed models can fit and obtained from the Monte-Carlo SPICE simulation of NMOS-based circuits with 99% confidence. At this point, both and have been verified based on NMOS technology as highly accurate.
3.2. PMOS-Based Verification
The graphical comparisons of the probability distributions are depicted in Figures 5 and 6 for verification in the qualitative sense of and that of . Strong agreements along with normal distributions of variations high frequency performances similar to those of NMOS-based verification have been found.
For verification in quantitative manner, on the other hand, KS from the test of can be found as and that from the test of is . Similar to the previous NMOS-based case, these KS values do not exceed . This means that the proposed model can fit and obtained from the simulation of PMOS-based circuits with 99% confidence. At this point, and are verified based on PMOS technology as highly accurate.
3.3. Higher Accuracy of
In order to show that proposed in this research is more accurate than its predecessor, its KS statistics have been compared with those of such predecessor as given in . Since the verification of the proposed and that of its predecessor are identical, the comparison of the obtained statistics is said to be unbiased.
Obviously, the KS values obtained from verifying the proposed which are 0.025466 for NMOS-based verification and 0.016144 for PMOS based are one, respectively-lower than those of the previous one in  given by 0.028462 for NMOS-based verification and 0.018036 for PMOS-based one . According to [25, 26], this means in this research is better fit to the simulated data than its predecessor  according to its lower KS statistics. This can be alternatively stated that the proposed is more accurate.
In this section, some discussions regarding to the applications of the proposed models introduced in the previous section and some verification results will be given.
4.1. Analytical Explanation of the Probabilistic/Statistical Behaviors of and and Other Variations
The probabilistic/statistical behaviors of , and variations in other high frequency parameters can be analytically explained by using their probabilistic/statistical parameters which can be derived by using the proposed and along with traditional statistical mathematic as analytical expressions involving physical level parameters. Simple examples of these parameters are means and variances of and . They can be derived by applying statistical mathematic to and as follows:
where , , , and denote mean and variance of along with those of , respectively. Analytically obtaining these parameters yields various benefits to the statistical/variability aware analysis/design of nanoscale MOSFET-based analog/mixed signal circuits and systems, for example, obtaining the design tradeoffs which are important issues and so forth. A simple example of such design tradeoffs is shrinking the transistor dimension reduces with increasing of as a penalty. This design tradeoff can be obtained from observations of (19b) and (20b) that and , respectively. It should be mentioned here that more sophisticated parameters such as moments of various orders, skewness, and kurtosis can also be derived by applying the statistical mathematic to and .
An interesting joint parameter of and is their correlation coefficient denoted by , which defines their statistical relationship. can be given in terms of , , , and as follows:
where denotes the expectation operator. By using (9) and (19a)–(20b) which can be obtained from and , along with (21), magnitude of has been found as unity. This means that there exists a very strong statistical relationship between and .
As mentioned above, the analytical explanation of the probabilistic/statistical behaviors of variations in other high frequency parameters can be performed by using the and as these high frequency parameters are functions of and/or . Let any of such high frequency parameter and its variation be denoted by and , respectively: can be given by
Obviously, is a random variable where its probabilistic/statistical behavior can be analytically explained by using its probabilistic/statistical functions/parameters which can be derived by using either the proposed and or related parameters which are their functions such as , , , , and so forth. Simple examples of such functions/parameters of are its mean and variance . They can be formulated in terms of , , , and as follows:
Obviously, the fact that magnitude of is unity obtained by using and as stated above has been used in the formulation of (24). By using (19a)–(20b) which can be obtained from the and , (23) and (24), and can be derived as analytical expressions in terms of physical level parameters.
More sophisticatedly, the probability density function of denoted by , where stands for the sample variable of , can be derived by using and along with a well-known statistical mathematic methodology entitled the transformation of random variables which can be found in the usual texts such as [28, 29], as is a function of and/or , since is a function of and/or as aforementioned. According to [28, 29], if is function of which can be either or as is function of which can be either or , can be given in a straightforward manner as
where stands for the probability density function of denoted by with expressed in terms of . Since can be either or , can be either or .
According to , if depends on both and as is a function of both and , can be given by
where denotes the sample variable of which stands for the variation in a conveniently chosen auxiliary function denoted by . Similar to , is also a function of both and . It should be mentioned here that can be found by applying (26d) and (26e) to which stands for the joint probability density function of and . This function can be found from the and by simultaneously solving the following equations:
The next subsection will discuss the application of and as the mathematical tool of the statistical/variability aware optimization scheme for nanoscale MOSFET’s high frequency performance.
4.2. Mathematical Tool of Statistical/Variability Aware Optimization Scheme
Obviously, target of the optimization has been found to be minimizing and . Simple objective functions can be obtained by using and which can be derived by using and as follows:
More sophisticatedly, the objective functions can be given in terms of and which stand for the probability of obtaining and that of obtaining , respectively. These probabilities can be determined from and by using the mathematical foundation in  as follows:
where and ; moreover, they may or may not be equal to each other. In this case, the optimal MOSFET’s parameters can be found by searching for those which maximize both and . As a result, the objective functions can be now given by
If a single objective function optimization scheme is required, which is the probability to obtain and simultaneously, can be used. This probability can be defined as in (31), where can be determined from and as shown in (27a) and (27b). In this case, the optimal MOSFET’s parameters can be found by searching for those which maximize . As a result, the objective function can be obtained as in (32).
The next subsection will give a discussion on the application of and as the mathematical tool of the variability aware simulation of nanoscale MOSFET’s high frequency performance with reduced computational effort.
4.3. Mathematical Tool for Reduced Computational Effort Variability Aware Simulation of High Frequency Parameters
Obviously, outcome of any variability aware simulation is often expressed as the standard deviation of the simulated parameter. Let any interested high frequency parameter of variability aware simulation be , the desired outcome in terms of can be conventionally determined by using the Monte-Carlo simulation which requires numerous runs . So, many of the computational efforts are consumed.
On the other hand, can be computed in a more computationally efficient manner by using the sensitivity of with respect to and that with respect to . These sensitivities can be determined by using the sensitivity analysis for which the targeted circuit/system is needed to be solved only once [24, 30]; then can be simply computed by using and of MOSFETs within the targeted circuit/system. It can be seen that much of the computational effort for determining is significantly reduced by using such sensitivity analysis-based method.
At this point, the sensitivity analysis-based computation of will be explained. Let any circuits/systems compose MOSFETs; can be given in terms of of any MOSFET,, that of any MOSFET,, of any MOSFET , and that of any MOSFET, , as
where , and denote correlation coefficient between of and MOSFET, that between of and MOSFET, and that between of MOSFET and of MOSFET, respectively. Their magnitudes can be approximated by unity when . Furthermore, , , , and denote sensitivity of to of MOSFET, that to of MOSFET, that to of MOSFET, and that to of MOSFET, respectively. These sensitivities can be determined by using the aforementioned sensitivity analysis. Finally, according to their definitions, () and () can be simply determined by substitution of the () MOSFET’s parameters into (19b) and (20b) which have been derived by using the proposed and .
In the next subsection, the application of and as the mathematical basis for analytical modeling of the high frequency performances mismatches between theoretically identical nanoscale MOSFETs will be discussed.
4.4. Basis for Analytical Modeling of High Frequency Performances Mismatches
For illustration, the mismatch in and that in will be considered by letting such mismatches between theoretically identical devices, denoted by and for mismatch in and that in , respectively. It should be mentioned here that , , , and denote of MOSFET, of MOSFET, of MOSFET, and of MOSFET.
Since the behaviors of mismatches can be conveniently modeled by their variances [31, 32], the modeling of and is to derive their variances, that is, and . Obviously the variances of , , , and which are fluctuated by the effects of random dopant fluctuation and process variation can be given by , , , and due to (8). Of course, ,, and can be determined by using and which are single devices oriented. In terms of these variances, and can be given as follows:
Obviously, transistors are highly correlated if they are closely spaced [31, 32]. So, and are minimized if the correlations are in the positive manner and maximized if devices are negatively correlated. On the other hand, correlation terms can be neglected from (34) if devices are distanced [31, 32]. In the final subsection, discussion regarding observations from the verification results will be given.
4.5. Observations from Verification Results
It can be observed from the formerly shown Monte-Carlo SPICE simulation results that the maximum percentages of and denoted by and , respectively, obtained from the NMOS-based circuits are higher than their counterparts from the PMOS ones. These maximum percentages are listed in Table 1. This means that high frequency performances of the nanoscale PMOS transistor is more robust to the random dopant fluctuation and process variation effects than that of NMOS one due to its lower and .
Furthermore, it has been observed that the KS values obtained from the PMOS-based verification are smaller than those obtained from the NMOS-based one. These statistics are repeated in Table 2 for convenience. This means that the proposed and model and of nanoscale PMOS transistor more accurately than they do to and of NMOS device according to such smaller statistics.
The novel complete probabilistic models of the random variations in nanoscale MOSFET’s high frequency performances have been proposed in this research as and , shown in (10) and (11) as respectively. They have been found to be both analytic and physical level oriented as many physical level variables have been involved. Obviously, the formerly overlooked has been now focused on. Both random dopant fluctuation and process variation effects have been taken into account. The nanoscale MOSFET equation  has been used as the mathematical basis, and the state of the art physical level fluctuation-induced characteristic variation model of MOSFET  has been adopted. So, is more accurate and physical level oriented than its predecessor . Both and have been verified based on the 65 nm CMOS process technology by using the Monte-Carlo SPICE simulations of the benchmark circuits and the Kolmogorov-Smirnov goodness of fit tests as very accurate since they fit the results of Monte-Carlo SPICE simulations with 99% confidence. Furthermore, they have various utilities such as analytical explanation of probabilistic/statistical behaviors of such random variations and others, as mentioned above. So, they have been found to be versatile for the statistical/variability aware analysis/design of nanoscale MOSFET-based analog/mixed signal circuits and systems.
The author would like to acknowledge Mahidol University, Thailand, for online database service.
- T. Yao, M. Gordon, K. Yau, M. T. Yang, and S. P. Voinigescu, “60-GHz PA and LNA in 90-nm RF-CMOS,” in Proceedings of the IEEE Radio Frequency Integrated Circuits Symposium, pp. 147–150, San Francisco, Calif, USA, June 2006.
- M. A. Masud, H. Zirath, M. Ferndahl, and H. O. Vickes, “90 nm CMOS MMIC amplifier,” in Proceedings of the IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 201–204, Forth Worth, Tex, USA, June 2004.
- Y. S. Jiang, Z. M. Tsai, J. H. Tsai, H. T. Chen, and H. Wang, “A 86 to 108 GHz amplifier in 90 nm CMOS,” IEEE Microwave and Wireless Components Letters, vol. 18, no. 2, pp. 124–126, 2008.
- B. Heydari, M. Bohsali, E. Adabi, and A. M. Niknejad, “Low-power mm-wave components up to 104 GHz in 90 nm CMOS,” in Proceedings of the 54th IEEE International Solid-State Circuits Conference (ISSCC'07), pp. 200–597, San Francisco, Calif, USA, February 2007.
- M. Varonen, M. Kärkkäinen, M. Kantanen, and K. A. I. Halonen, “MM-wave integrated circuits in 65-nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 43, no. 9, pp. 1991–2002, 2008.
- A. M. Niknejad, S. Emami, B. Heydari, M. Bohsali, and E. Adabi, “Nanoscale CMOS for mm-wave applications,” in Proceedings of the IEEE Compound Semiconductor Integrated Circuit Symposium (CSIC'07), pp. 1–4, Portland, Ore, USA, October 2007.
- D. Draxelmayr, “A 6 b 600 MHz 10 mW ADC array in digital 90 nm CMOS,” in Proceedings of the IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC'04), pp. 264–265, February 2004.
- Y. Shimizu, S. Murayama, K. Kudoh, H. Yatsuda, and A. Ogawa, “A 30 mW 12b 40MS/s subranging ADC with a high-gain offset-canceling positive-feedback amplifier in 90nm digital CMOS,” in IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC'06), pp. 802–811, San Francisco, Calif, USA, February 2006.
- A. Matsuzawa, “Design challenges of analog-to-digital converters in nanoscale CMOS,” IEICE Transactions on Electronics, vol. E90-C, no. 4, pp. 779–785, 2007.
- H. Masuda, T. Kida, and S. I. Ohkawa, “Comprehensive matching characterization of analog CMOS circuits,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E92-A, no. 4, pp. 966–975, 2009.
- R. Banchuin, “Process induced random variation models of nanoscale MOS performance: efficient tool for the nanoscale regime analog/mixed signal CMOS statistical/variability aware design,” in Proceedings of the International Conference on Information and Electronic Engineering, pp. 6–12, Bangkok, Thailand, 2011.
- R. Banchuin, “Complete circuit level random variation models of nanoscale MOS performance,” International Journal of Information and Electronics Engineering, vol. 1, no. 1, pp. 9–15, 2011.
- K. Hasegawa, M. Aoki, T. Yamawaki, and S. Tanaka, “Modeling transistor variation using α-power formula and its application to sensitivity analysis on harmonic distortion in differential amplifier,” Analog Integrated Circuits and Signal Processing, vol. 72, no. 3, pp. 605–613, 2012.
- A. R. Brown and A. Asenov, “Capacitance fluctuations in bulk MOSFETs due to random discrete dopants,” Journal of Computational Electronics, vol. 7, no. 3, pp. 115–118, 2008.
- Y. Li and C. H. Hwang, “High-frequency characteristic fluctuations of nano-MOSFET circuit induced by random dopants,” IEEE Transactions on Microwave Theory and Techniques, vol. 56, no. 12, pp. 2726–2733, 2008.
- M. H. Han, Y. Li, and C. H. Hwang, “The impact of high-frequency characteristics induced by intrinsic parameter fluctuations in nano-MOSFET device and circuit,” Microelectronics Reliability, vol. 50, no. 5, pp. 657–661, 2010.
- H. S. Kim, C. Chung, J. Lim, K. Park, H. Oh, and H. K. Kang, “Characterization and modeling of RF-performance (fT) fluctuation in MOSFETs,” IEEE Electron Device Letters, vol. 30, no. 8, pp. 855–857, 2009.
- R. Banchuin, “The probabilistic model of random variation in nanoscale MOSFET’s high frequency performance,” in Proceedings of the 6th WSEAS International Conference on Computer Engineering and Applications, and Proceedings of the 2012 American Conference on Applied Mathematics, pp. 240–245, January 2012.
- M. J. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers, “Matching properties of MOS transistors,” IEEE Journal of Solid-State Circuits, vol. 24, no. 5, pp. 1433–1440, 1989.
- K. Kuhn, “Variability in nanoscale CMOS technology,” Science China Information Sciences, vol. 54, no. 5, pp. 936–945, 2011.
- L. L. Lewyn, T. Ytterdal, C. Wulff, and K. Martin, “Analog circuit design in nanoscale CMOS technologies,” Proceedings of the IEEE, vol. 97, no. 10, pp. 1687–1714, 2009.
- H. Abebe, H. Morris, E. Cumberbatch, and V. Tyree, “Compact gate capacitance model with polysilicon depletion effect for MOS device,” Journal of Semiconductor Technology and Science, vol. 7, no. 3, pp. 131–135, 2007.
- R. T. Howe and C. G. Sodini, Microelectronics: An Integrated Approach, Prentice Hall, Upper Saddle River, NJ, USA, 1996.
- G. Cijan, T. Tuma, and A. Burmen, “Modeling and simulation of MOS transistor mismatch,” in Proceedings of the 6th Eurosim, pp. 1–8, Ljubljana, Slovenia, 2007.
- T. Altiok and B. Melamed, Simulation Modeling and Analysis with ARENA, Academic Press, New York, NY, USA, 2007.
- S. A. Klugman, H. H. Panjer, and G. E. Willmot, Loss Models: From Data to Decisions, John Wiley & Sons, London, UK, 2008.
- Predictive Technology Model, http://ptm.asu.edu.
- A. H. Haddad, Probabilistic Systems and Random Signals, Prentice Hall, Upper Saddle River, NJ, USA, 2006.
- W. W. Hines, D. C. Montgomery, D. M. Goldsman, and C. M. Borror, Probability and Statistics in Engineering, John Wiley & Sons, London, UK, 2003.
- M. Conti, P. Grippa, S. Orcioni, and C. Turchetti, “Parametric yield formulation of MOS IC's affected by mismatch effect,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 5, pp. 582–596, 1999.
- A. Cathignol, S. Mennillo, S. Bordez, L. Vendrame, and G. Ghibaudo, “Spacing impact on MOSFET mismatch,” in Proceedings of the IEEE Conference on Microelectronic Test Structures (ICMTS'08), pp. 90–95, Edinburgh, UK, March 2008.
- C. M. Mezzomo, A. Bajolet, A. Cathignol, R. Di Frenza, and G. Ghibaudo, “Characterization and modeling of transistor variability in advanced CMOS technologies,” IEEE Transactions on Electron Devices, vol. 58, no. 8, pp. 2235–2248, 2011.