A Strategy for Automatic Quality Signing and Verification Processes for Hardware and Software Testing

<table class="table-group" width="800px"><tr class="fig-image" id="a"><td><img alt="323429.fig.001a" src="https://static.hindawi.com/articles/ase/volume-2010/323429/figures/323429.fig.001a.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(a) </b>Quality signing process</td></tr></table></td></tr><tr class="fig-image" id="b"><td><img alt="323429.fig.001b" src="https://static.hindawi.com/articles/ase/volume-2010/323429/figures/323429.fig.001b.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(b) </b>Quality verification process</td></tr></table></td></tr></table>

<table>The quality signing and verification processes.</table>

Advances in Software Engineering

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Figure 1

Figure 1: A Strategy for Automatic Quality Signing and Verification Processes for Hardware and Software Testing 