Barrier Evaluation by Linearly Increasing Voltage Technique Applied to Si Solar Cells and Irradiated Pin Diodes
Figure 12
(a) A family of transients, measured by varying LIV pulse ramp, fitted by simulated ones, when minimum for least-square deviations between simulated and experimental transients has been obtained. The set of parameters , and has been simultaneously extracted by this fitting procedure. The extracted values are denoted within a legend. (b) Comparison of the fluence dependent variations of the barrier capacitance measured by BELIV technique employing both reverse (stars) and forward (crosses) LIV pulses at K. Values of obtained for nonirradiated Si diodes of different technology are also shown in (b).