Designing of 2-Stage CPU Scheduler Using Vague Logic

Algorithm 3

[𝑦,𝑧] = Priority(𝑃,𝑛);

[𝑎,𝑐] = burst_time(𝐵,𝑛);

for 𝑖=1 : 𝑛

𝑀_𝐵(𝑖) = (𝑎(𝑖)+1−𝑐(𝑖))/2;

𝑀_𝑃(𝑖) = (𝑦(𝑖)+1−𝑧(𝑖))/2;

𝐷_𝑃(𝑖) = max(𝑀_𝐵(𝑖), 𝑀_𝑃(𝑖));

End