A Polyadic pi-Calculus Approach for the Formal Specification of UML-RT

Table 3

UML-RT transitions’ specification for the capsule TopSystem and its subcapsules.

Capsule	Transition	UML-RT trigger	UML-RT action
TopSystem	Initial	—	setCT·portName(𝑥)·send();
			setET·portName(𝑦) ·send();
Source	Initial	—	—
	timeout	Port: timer	—
		Signal: timeout
	sendPortX	—	𝑞⋅portName(𝑥)·send();
	sendPortY	—	𝑞⋅portName(𝑦)·send();
	timeout2	—	—
Router	Initial	—	—
	receivePort	Port: r	𝑎 = *rtdata;
		Signal: portName	alert·registerSPP(𝑎);
	sendMsg	Port: timer	𝑚⋅msg1 = 𝑏1;
			𝑚⋅msg2 = 𝑏2;
		Signal: timeout	alert·msg(𝑚)·send();
	waitPort	Port: timer	—
		Signal: timeout
ConsumerTarget	Initial	—	—
	configPort	Port: setPort	aux = *rtdata;
		Signal: portName	𝑠⋅registerSAP(aux);
	consumeMsg	Port: s	𝑚 = *rtdata;
			𝑐1 = 𝑚·msg1;
		Signal: msg	𝑐2 = 𝑚·msg2;
	waitMsg	Port: timer	—
		Signal: timeout
ExporterConsumer	Initial	—	—
	configPort	Port: setPort	aux = *rtdata;
		Signal: portName	𝑡⋅registerSAP(aux);
	Initial1	—	—
	Initial2	—	—
	receiveMsg	Port: t	𝑚 = *rtdata;
			𝑑1 = 𝑚⋅msg1;
		Signal: msg
			𝑑2 = 𝑚⋅msg2;
	consumeMsg	—	—
	exportMsg	—	export·msg(𝑑1) ·send();
	msgConsumed	—	—
	msgExported	—	—
	waitMsg	Port: timer	—
		Signal: timeout