International Journal of Microwave Science and Technology

Research Article

Design and Realization of GaAs Digital Circuit for Mixed Signal MMIC Implementation in AESA Applications

Figure 5

Depletion-based FET logic: (a) BFL; (b) SDFL; (c) CCFL.
387137.fig.005a
(a)
387137.fig.005b
(b)
387137.fig.005c
(c)