International Journal of Microwave Science and Technology

Research Article

Design and Realization of GaAs Digital Circuit for Mixed Signal MMIC Implementation in AESA Applications

Figure 7

Enhancement-/Depletion-based FET logic: (a) DCFL; (b) SBFL; (c) F2L.
387137.fig.007a
(a)
387137.fig.007b
(b)
387137.fig.007c
(c)