Multiple Gate Delay Tracking Structures for GNSS Signals and Their Evaluation with Simulink, SystemC, and VHDL

Figure 15

Implemented delay registers: (a) uniform delay spacing, (b) decreasing delay spacing. Ref code is reference code chip value from code generator, VVE, VE, E are early, P is prompt, and L, VL, VVL late outputs of the delay register. The relative correlator spacings (Δ₁,Δ₂,Δ₃) are illustrated on top. 𝑍⁻¹ is the smallest uniform delay.

(a) Delay registers with uniform spacing

(b) Delay registers with decreasing spacing