Table of Contents
ISRN Signal Processing
Volume 2011, Article ID 414293, 17 pages
Review Article

An Automated Fixed-Point Optimization Tool in MATLAB XSG/SynDSP Environment

1Electrical Engineering Department, University of California, Los Angeles, CA 90095, USA
2P.O. Box 4004, Incline Village, NV 89450, USA
3Berkeley Wireless Research Center, Berkeley, CA 94704, USA

Received 8 December 2010; Accepted 20 January 2011

Academic Editor: B. Yuan

Copyright © 2011 Cheng C. Wang et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


This paper presents an automated tool for floating-point to fixed-point conversion. The tool is based on previous work that was built in MATLAB/Simulink environment and Xilinx System Generator support. The tool is now extended to include Synplify DSP blocksets in a seamless way from the users' view point. In addition to FPGA area estimation, the tool now also includes ASIC area estimation for end-users who choose the ASIC flow. The tool minimizes hardware cost subject to mean-squared quantization error (MSE) constraints. To obtain more accurate ASIC area estimations with synthesized results, 3 performance levels are available to choose from, suitable for high-performance, typical, or low-power applications. The use of the tool is first illustrated on an FIR filter to achieve over 50% area savings for MSE specification of 10−6 as compared to all 16-bit realization. More complex optimization results for chip-level designs are also demonstrated.