Table of Contents
ISRN Electronics
Volume 2012 (2012), Article ID 271836, 11 pages
http://dx.doi.org/10.5402/2012/271836
Review Article

A Short Historical Survey of Functional Hardware Languages

Lingcore Laboratory, 2721 Grand Oaks Loop, Cedar Park, TX 78613, USA

Received 24 January 2012; Accepted 11 February 2012

Academic Editors: S.-F. Hsiao and A. Mercha

Copyright © 2012 Gang Chen. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Linked References

  1. J. A. N. Lee, Computer Semantics, Van Nostrand Reinhold Company, 1972.
  2. M. Sheeran, μFP, an algebraic VLSI design language, Ph.D. thesis, Oxford University, 1983.
  3. J. O’Donnell, “Generating netlists from executable circuit specifications in a pure functional language,” in Proceedings of the Functional Programming Workshops in Computing, Glasgow 1992, Springer, 1993.
  4. P. Bjesse, K. Claessen, M. Sheeran, and S. Singh, “Lava: hardware design in Haskell,” in Proceedings of the 3rd ACM SIGPLAN International Conference on Functional Programming (ICFP '98), pp. 174–184, September 1998. View at Scopus
  5. C.-J. H. Seger, R. B. Jones, J. W. O'Leary et al., “An industrially effective environment for formal hardware verification,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 9, pp. 1381–1405, 2005. View at Publisher · View at Google Scholar
  6. C. Kern and M. R. Greenstreet, “Formal verification in hardware design: a survey,” ACM Transactions on Design Automation of Electronic Systems, vol. 4, no. 2, pp. 123–193, 1999. View at Google Scholar
  7. P. Wegner, “The Vienna definition language,” ACM Computing Surveys, vol. 4, no. 1, pp. 5–63, 1972. View at Publisher · View at Google Scholar
  8. R. T. Boute, “Representational and denotational semantics of digital systems,” IEEE Transactions on Computers, vol. 38, no. 7, pp. 986–999, 1989. View at Publisher · View at Google Scholar · View at MathSciNet · View at Scopus
  9. R. E. Frankel and S. W. Smoliar, “Beyond register transfer: an algebraic approach for architectural description,” in Proceedings of the 4th International Conference on Computer Hardware Description Languages, pp. 1–5, 1979.
  10. R. E. Frankel and S. W. Smoliar, “Digital systems as mathematical expressions,” in Proceedings of the International Conference on COMPCON (COMPCON '81), pp. 414–416, Spring, 1981.
  11. L. Cardelli and G. D. Plotkin, “An algebraic approach to VLSI design,” in Proceedings of the 1st International Conference on Very Large Scale Integration (VLSI '81), J. P. Gray, Ed., pp. 173–182, University of Edinburgh, Academic Press, August 1981.
  12. L. Cardelli, “Sticks&stones: an applicative VLSI design language,” Internal Report CSR-85-81, University of Edinburgh, Department of Computer Science, 1981. View at Google Scholar
  13. M. Sheeran, “mμFP, a language for VLSI design,” in Proceedings of the Conference Record of the ACM Symposium on LISP and Functional Programming (LISP '84), pp. 104–112, Austin, Tex, USA, 1984.
  14. S. D. Johnson, Synthesis of Digital Designs from Recursion Equations, The MIT Press, Cambridge, Mass, USA, 1983.
  15. P. Henderson, “Functional geometry,” in Proceedings of the ACM Symposium on LISP and Functional Programming (LISP '82), p. 179, 1982.
  16. S. D. Johnson, “Applicative programming and digital design,” in Proceedings of the Conference Record of the 11th Annual ACM Symposium on Principles of Programming Languages (POPL '84), pp. 218–227, 1984. View at Scopus
  17. F. Meshkinpour and M. D. Ercegovac, “A functional language for description and design of digital systems: sequential constructs,” in Proceedings of the 22nd ACM/IEEE Conference on Design Automation, pp. 238–244, ACM Press, 1985. View at Scopus
  18. M. D. Ercegovac and T. Lang, “A high-level language approach to custom chip layout design,” Technical Report MICRO Project Reports 1982-83, University of California, Berkeley, Calif, USA, 1982. View at Google Scholar
  19. D. R. Patel, M. Schlag, and M. D. Ercegovac, “An environment for the multi-level specification, analysis, and synthesis of hardware algorithms,” in Proceedings of the Conference on Functional Programming Languages and Computer Architecture, vol. 201 of Lecture Notes in Computer Science, pp. 238–255, Springer, 1985.
  20. J. O’Donnell, “Hydra: hardware description in a functional language using recursion equations and high order combining forms,” in Proceedings of the Fusion of Hardware Design and Verification, G. J. Milne, Ed., pp. 309–328, North-Holland, Amsterdam, The Netherlands, 1988.
  21. J. O’Donnell, “Hardware description with recursion equations,” in Proceedings of the 8th International Symposium on Computer Hardware Description Languages and Their Applications (CHDL '87), M. R. Barbacci and C. J. Koomen, Eds., IFIP WG 10.2, pp. 363–382, North Holland, 1987.
  22. J. O’Donnell, “Embedding a hardware description language in template Haskell,” in Domain-Specific Program Generation: International Seminar, Dagstuhl Castle, German, C. Lengauer, D. Batory, C. Consel, and M. Odersky, Eds., vol. 3016 of Lecture Notes in Computer Science, Springer, 2004. View at Google Scholar
  23. W. A. Hunt Jr., FM8501: a verified microprocessor, Ph.D. thesis, 1985.
  24. B. Brock and W. A. Hunt Jr., “The formalization of a simple hardware description language,” in Applied Formal Methods For Correct VLSI Design, L. Claessen, Ed., pp. 778–792, Elsevier Science Publishers B.V., Amsterdam, The Netherlands, 1989. View at Google Scholar
  25. B. Brock, W. A. Hunt Jr., and W. D. Young, “Introduction to a formally defined hardware description language,” in Proceedings of the IFIP TC10/WG 10.2 International Conference on Theorem Provers in Circuit Design: Theory, Practice and Experience, Nijmegen (TPCD '92), V. Stavridou, T. F. Melham, and R. T. Boute, Eds., vol. 10 of IFIP Transactions, pp. 3–35, North-Holland, Amsterdam, The Netherlands, June 1992.
  26. B. Brock and W. A. Hunt Jr., “The dual-eval hardware description language and its use in the formal specification and verification of the FM9001 microprocessor,” Formal Methods in System Design, vol. 11, no. 1, pp. 71–104, 1997. View at Google Scholar
  27. J. De Man, “The description of digital systems by means of a functional language,” Internal Report, Bell Telephone Mfg. Cy, Antwerp, Belgium, 1986. View at Google Scholar
  28. C. van Reeuwijk, The implementation of a systems description language and its semantic functions, Ph.D. thesis, Delft University, 1991.
  29. D. Lahti, Applications of a functional programming language to hardware synthesis, M.S. thesis, 1980.
  30. D. Lahti, “Application of a functional programming language,” Tech. Rep. CSD-810403, University of California, Los Angeles, Department of Computer Science, Los Angeles, Calif, USA, 1981. View at Google Scholar
  31. M. Sheeran, “Describing hardware algorithms in Ruby,” in Proceedings of the Declarative Systems, North-Holland, 1990.
  32. G. Jones and M. Sheeran, “Circuit design in Ruby,” in Formal Methods for VLSI Design, J. Staunstrup, Ed., Lecture Notes on Ruby from a Summer School in Lyngby, Denmark, North Holland, 1990. View at Google Scholar
  33. G. Jones, “Designing circuits by calculation,” Tech. Rep. PRG-TR10-90, Oxford University Press, New York, NY, USA, 1990. View at Google Scholar
  34. G. Jones and M. Sheeran, “A certain loss of identity,” in Proceedings of the Functional Programming, Workshops in Computing, J. Launchbury and P. M. Sansom, Eds., pp. 113–121, Springer, London, UK, 1992.
  35. G. Jones and M. Sheeran, “Designing arithmetic circuits by refinement in Ruby,” Science of Computer Programming, vol. 22, no. 1-2, pp. 107–135, 1994. View at Google Scholar
  36. G. Jones and M. Sheeran, “Deriving bit-serial circuits in Ruby,” in Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration (VLSI '91), pp. 71–80, 1991.
  37. G. Hutton, “The Ruby Interpreter,” Research Report 72, Chalmers University of Technology, 1993. View at Google Scholar
  38. R. McPhee, “Implementing Ruby in a higher-order logic programming language,” Tech. Rep., Oxford University Computing Laboratory, 1995. View at Google Scholar
  39. R. McPhee, Towards a relational programming language, Qualifying Dissertation Submitted in Application for Transfer to DPhil Status, 1995.
  40. O. Sandum, Translation of Ruby into VHDL, M.S. thesis, Department of Computer Science, Technical University of Denmark, 1994, 2.
  41. R. Sharp, “T-Ruby: a tool for handling Ruby expressions,” Tech. Rep. ID-TR: 1994-154, Departement of Computer Science, Technical University of Denmark, 1994. View at Google Scholar
  42. R. Sharp and O. Rasmussen, “Transformational rewriting with Ruby,” in Proceedings of the Computer Hardware Description Languages and their Applications, D. Agnew, L. Claesen, and R. Camposano, Eds., pp. 231–248, Elsevier Science B.V., Ottawa, Canada, 1993.
  43. R. Sharp and O. Rasmussen, “An introduction to Ruby,” Tech. Rep. ID–U: 1995-80, Department of Computer Science, Technical University of Denmark, 1994. View at Google Scholar
  44. G. Hutton, “A relational derivation of a functional program,” in Proceedings of the STOP Summer School on Constructive Algorithmics, Ameland, The Netherlands, September 1992.
  45. G. Hutton, Between functions and relations in calculating programs, Ph.D. thesis, University of Glasgow, 1992, Research Report FP-93-5.
  46. L. Rossen and R. Algebra, “Designing correct circuits,” in Proceedings of the Workshops in Computing, G. Jones and M. Sheeran, Eds., pp. 297–312, Springer, 1990.
  47. L. Rossen and R. Sharp, “Sequence semantics of Ruby,” in Proceedings of the Designing Correct Circuits, J. Staunstrup and R. Sharp, Eds., vol. A-5, pp. 159–171, North-Holland, 1992.
  48. R. Sharp and O. Rasmussen, “Using a language of functions and relations for VLSI specification,” in Proceedings of the 7th International Conference on Functional Programming Languages and Computer Architecture (FPCA ’95), pp. 45–54, ACM Press, NewYork, NY, USA, 1995.
  49. R. Sharp, “The Ruby framework,” Tech. Rep. ID-TR: 1993-119, Departement of Computer Science, Technical University of Denmark, 1993. View at Google Scholar
  50. R. Sharp and O. Rasmussen, “The T-Ruby design system,” Formal Methods in System Design, vol. 11, no. 3, pp. 239–264, 1997. View at Google Scholar
  51. O. Rasmussen, “An embedding of Ruby in Isabelle,” in Proceedings of the 13th International Conference on Automated Deduction, M. A. McRobbie and J. K. Slaney, Eds., vol. 1104 of Lecture Notes in Artificial Intelligence, pp. 186–200, Springer, New Brunswick, NJ, USA, 1996.
  52. O. Rasmussen, “Formalising ruby in isabelle,” in Proceedings of the 1st Isabelle Users Work Shop, L. C. Paulson, Ed., University of Cambridge, Computer Laboratory, Cambridge, UK, 1995.
  53. C. J. Block, A graphical interface for ruby, M.S. thesis, Datavetenskap, Chalmers Tekniska Hgskola, 1996.
  54. K. Claessen and M. Sheeran, A Tutorial on Lava: A Hardware Description and Verification System, 2000.
  55. S. Singh, “System level specification in lava,” in Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE '03), pp. 370–375, IEEE Computer Society, 2003. View at Publisher · View at Google Scholar
  56. K. Claessen, M. Sheeran, and S. Singh, “Using lava to design and verify recursive and periodic sorters,” International Journal on Software Tools for Technology Transfer, vol. 4, no. 3, pp. 349–358, 2003. View at Google Scholar
  57. K. Claessen, Embedded languages for describing and verifying hardware, Ph.D. thesis, Department of Computer Science and Engineering, Chalmers University of Technology, 2001.
  58. K. Claessen, M. Sheeran, and S. Singh, “The design and verification of a sorter core,” in Proceedings of the Conference on Correct Hardware Design and Verification Methods (CHARME '01), Lecture Notes in Computer Science, Springer, New York, NY, USA, 2001.
  59. K. Claessen, M. Sheeran, and S. Singh, “Functional hardware description in Lava,” in The Fun of Programming, Cornerstones of Computing, pp. 151–176, Palgrave, 2003. View at Google Scholar
  60. S. Singh, The lava hardware description language, http://raintown.org/lava/.
  61. S. Singh and P. James-Roxby, “Lava and JBits: from HDL to bitstream in seconds,” in Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM ’01), pp. 91–100, IEEE Computer Society, Washington, DC, USA, 2001.
  62. S. Singh, “Designing reconfigurable systems in Lava,” in Proceedings of 17th International Conference on VLSI Design, Concurrently with the 3rd International Conference on Embedded Systems Design (VLSI '04), vol. 17, pp. 299–306, IEEE Computer Society, 2004.
  63. S. Singh and M. Sheeran, “Designing FPGA circuits in lava,” In press.
  64. K. Claessen and D. Sands, “Observable sharing for functional circuit description,” in Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science (ASIAN ’99), pp. 62–73, Springer, London, UK, 1999.
  65. J. O'Leary, M. H. Linderman, M. Leeser, and M. Aagaard, “HML: a hardware description language based on standard ML,” in Proceedings of the IFIP Conference on Hardare Description Languages and Their Applications (CHDL '93), no. A-32, pp. 327–334, 1993.
  66. Y. Li and M. Leeser, “HML: an innovative hardware description language and its translation to VHDL,” in Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC '95), pp. 691–696, 1995.
  67. Y. Li, HML: an innovative hardware description language and its translation to VHDL, M.S. thesis, Graduate School of Cornell University, 1995.
  68. Y. Li and M. Leeser, “HML, a novel hardware description language and its translation to VHDL,” IEEE Transactions on Very Large Scale Integration Systems (VLSI '00), vol. 8, no. 1, pp. 1–8, 2000. View at Publisher · View at Google Scholar
  69. Matthews, Cook, and Launchbury, “Microprocessor specification in hawk,” Proceedings of the IEEE International Conference on Computer Languages (ICCL '98), pp. 90–101, 1998. View at Publisher · View at Google Scholar
  70. B. Cook, J. Launchbury, and J. Matthews, “Microprocessor specification in hawk,” in Proceedings of the International Conference on Computer Languages (FTH '98), pp. 90–101, May 1998. View at Scopus
  71. J. Matthews, J. Launchbury, and B. Cook, “Microprocessor specification in hawk,” in Proceedings of the IEEE International Conference on Computer Languages (ICCL ’98), pp. 90–101, 1998. View at Publisher · View at Google Scholar
  72. J. Launchbury, J. R. Lewis, and B. Cook, “On embedding a microarchitectural design language within Haskell.,” in Proceedings of the International Conference on Functional Programming (ICFP '99), pp. 60–69, 1999.
  73. J. Matthews, Algebraic specification and verification of processor microarchitectures, Ph.D. thesis, Oregon Graduate Institute, 2000.
  74. N. A. Day, J. R. Lewis, and B. Cook, “Symbolic simulation of microprocessor models using type classes 18 in Haskell,” in Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME '99), Lecture Notes in Computer Science, pp. 346–349, Springer, London, UK, 1999.
  75. N. A. Day, J. R. Lewis, and B. Cook, “Symbolic simulation of microprocessor models using type classes in Haskell,” Tech. Rep. CSE-99-005, Department of Computer Science, Oregon Graduate Institute, 1999. View at Google Scholar
  76. S. Krstic, B. Cook, J. Launchbury, and J. Matthews, “Top-level refinement in processor verification,” Tech. Rep., 1998. View at Google Scholar
  77. S. Krstic, B. Cook, J. Launchbury, and J. Matthews, A Correctness Proof of a Speculative, Superscalar, Out-of-Order, Renaming Microarchitecture, 1998.
  78. J. D. Morison, N. E. Peeling, and T. L. Thorp, “The design rationale of ella, a hardware design and description language,” in Proceedings of the 7th International Symposium on Computer Hardware Description Languages and their Applications (CHDL '85), pp. 303–320, North-Holland, 1985.
  79. Arvind and X. Shen, “Using term rewriting systems to design and verify processors,” IEEE Micro, vol. 19, no. 3, pp. 36–46, 1999. View at Publisher · View at Google Scholar · View at Scopus
  80. J. C. Hoe and Arvind, “Hardware synthesis from term rewriting systems,” in Proceedings of the IFIP TC10/WG10.5 10th International Conference on Very Large Scale Integration (VLSI ’99), L. M. Silveira, S. Devadas, and R. A. da Luz Reis, Eds., vol. 162, pp. 595–619, Kluwer, Lisbon, Portugal, December 1999.
  81. J. C. Hoe and Arvind, “Synthesis of operation-centric hardware descriptions,” in Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD '00), pp. 511–518, 2000.
  82. Blucspec Inc., http://bluespec.com.
  83. C. Seger, “Voss—a formal hardware verification system user's guide,” Tech. Rep., UBC Press, Vancouver, Canada, 1993. View at Google Scholar
  84. M. Aagaard, R. B. Jones, T. F. Melham, J. W. O'Leary, and C.-J. H. Seger, “A methodology for large-scale hardware verification,” in Proceedings of the 3rd International Conference on Formal Methods in Computer-Aided Design (FMCAD ’00), pp. 263–282, Springer, London, UK, 2000.
  85. R. B. Jones, J. W. O'Leary, C.-J. H. Seger, M. D. Aagaard, and T. F. Melham, “Practical formal verification in microprocessor design,” IEEE Design and Test of Computers, vol. 18, no. 4, pp. 16–25, 2001. View at Publisher · View at Google Scholar · View at Scopus
  86. M. D. Aagaard, R. B. Jones, and C.-J. H. Seger, “A pragmatic implementation of combined model checking and theorem proving,” in Proceedings of the 12th International Conference (TPHOLs '99), July 1999.
  87. J. Grundy, T. Melham, and J. O'Leary, “A reflective functional language for hardware design and theorm proving,” Tech. Rep. PRG-RR-03-16, Oxford Univerity, Computing Laboratory, 2003. View at Google Scholar
  88. J. Grundy, T. Melham, and J. O'Leary, “A reflective functional language for hardware design and theorem proving,” Journal of Functional Programming, vol. 15, no. 2, pp. 157–196, 2006. View at Publisher · View at Google Scholar
  89. S. Krstic and J. Matthews, “Semantics of the eflect language,” in Proceedings of the 6th ACM SIGPLAN International Conference on Principles and Practice of Declarative Programming (PPDP ’04), pp. 32–42, ACM Press, New York, NY, USA, 2004.
  90. S. Krstic and J. Matthews, “Subject reduction and confluence for the reFLect language,” Tech. Rep. CSE-03-014, OGI, 2003. View at Google Scholar
  91. http://web.comlab.ox.ac.uk/oucl/work/tom.melham/res/reflect.html.
  92. W. Taha and T. Sheard, “Metamland multi-stage programming with explicit annotations,” Theoretical Computer Science, vol. 248, no. 1-2, pp. 211–242, 2000. View at Google Scholar
  93. T. Sheard, “Accomplishments and research challenges in meta-programming,” in Proceedings of the Second International Workshop on Semantics, Applications, and Implementation of Program Generation (SAIG '01), pp. 2–44, Springer, London, UK, August 2000. View at Scopus
  94. M. D. Aagaard, R. B. Jones, and C.-J. H. Seger, “Combining theorem proving and trajectory evaluation in an industrial environment,” in Proceedings of the 35th Design Automation Conference, pp. 538–541, ACM/IEEE, June 1998. View at Scopus
  95. J. O’Leary, X. Zhao, R. Gerth, and C.-J. H. Seger, “Formally verifying IEEE compliance of floating-point hardware,” Intel Technology Journal, vol. 3, no. 1, article 10, 1999. View at Google Scholar
  96. A. Mycroft and R. Sharp, “A statically allocated parallel functional language,” in Proceedings of the 27th International Colloquium on Automata, Languages and Programming (ICALP '00), Montanari et al., Ed., vol. 1853 of Lecture Notes in Computer Science, pp. 37–48, Springer, 2000.
  97. R. Sharp and A. Mycroft, “Soft scheduling for hardware,” in Proceedings of the 8th International Symposium on Static Analysis (SAS '01 ), P. Cousot, Ed., vol. 2126 of Lecture Notes in Computer Science, pp. 57–72, Springer, London, UK, 2001.
  98. A. Mycroft and R. Sharp, “Hardware/software co-design using functional languages,” in Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS '01), T. Margaria and W. Yi, Eds., pp. 236–251, 2001.
  99. A. Mycroft and R. Sharp, “Hardware synthesis using safl and application to processor design,” in Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME '01), T. Margaria and Melham, Eds., 2001.
  100. R. Sharp, “Functional design using behavioural and structural components,” in Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design (FMCAD '02), M. Aagaard and J. W. O’Leary, Eds., pp. 324–341, Springer, Portland, Ore, USA, 2002.
  101. A. Mycroft and R. Sharp, “Higher-level techniques for hardware description and synthesis,” International Journal on Software Tools for Technology Transfer, vol. 4, no. 3, pp. 271–297, 2003. View at Google Scholar
  102. R. Sharp and A. Mycroft, “A higher-level language for hardware synthesis,” in Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME '01), vol. 2144 of Lecture Notes in Computer Science, p. 228, 2001.
  103. R. Sharp, Higher-Level Hardware Synthesis, Springer, New York, NY, USA, 2005.
  104. W. Taha, “Resource-aware programming,” in Proceedings of the 1st International Conference of the Embedded Software and Systems (ICESS '04), Z. Wu, C. Chen, M. Guo, and J. Bu, Eds., vol. 3605 of Lecture Notes in Computer Science, pp. 38–43, Springer, 2004.
  105. O. Kiselyov, K. N. Swadi, and W. Taha, “A methodology for generating verified combinatorial circuits,” in Proceedings of the 4th ACM International Conference on Embedded Software (EMSOFT '04), G. C. Buttazzo, Ed., pp. 249–258, ACM Press, 2004.
  106. W. Taha, “A gentle introduction to multi-stage programming,” in Domain-Specific Program Generation, C. Lengauer, D. S. Batory, C. Consel, and M. Odersky, Eds., vol. 3016 of Lecture Notes in Computer Science, pp. 30–50, Springer, 2003. View at Google Scholar
  107. A. Megacz, “Multi-stage programming languagemeta-hdl,” In press.
  108. E. Axelsson, K. Ciaessen, and M. Sheeran, “Wired: wire-aware circuit design,” Proceedings of the Conference on Correct Hardware Design and Verification Methods (CHARME '05), vol. 3725, pp. 5–19, 2005. View at Publisher · View at Google Scholar
  109. Galois Inc., http://www.galois.com/.
  110. “Introducing scheduling primitives and derived interfaces in bluespec,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, T. Margaria and W. Yi, Eds.A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  111. Arvind, N. Dave, and M. Pellauer, “Introducing scheduling primitives and derived interfaces in bluespec,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  112. S. Singh, “Declarative programming techniques for many-core architectures,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  113. M. Sheeran, “Searching for prefix networks to fit in a context using a lazy functional programming language,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, Participants, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  114. R. S. Boyer and W. A. Hunt Jr., “The e language,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  115. C.-J. H. Seger, “High-level micro-architectural transformations and cycle-accurate high-level models,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  116. K. Claessen and G. Pace, “Embedded hardware description languages: exploring the design space,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  117. M. Naylor, E. Axelsson, and C. Runciman, “Lightweight relational programming for wired,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  118. A. K. Martin and A. Gheith, “A framework for designing hardware in ocaml,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  119. N. Chong and S. Ishtiaq, “Functional programming for hardware definition, verification and modelling,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  120. M. Schmidt-Schauß and D. Sabel, “Program transformation for functional circuit descriptions,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  121. J. B. Note and J. Vuillemin, “Towards automatically compiling efficient fpga hardware,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  122. T. Sheard, “Design principles for hardware description,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  123. W. Taha, Y. Alkabani, C. Andraos et al., “Hardware descriptions as two level computations,” in Proceedings of the International Workshop on Hardware Design and Functional Languages, A. Martin, C.-J. Seger, and M. Sheeran, Eds., March 2007.
  124. J. Gillenwater, G. Malecha, C. Salama et al., “Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee Verilog synthesizability,” in Proceedings of the ACM Symposium on Partial Evaluation and Semantics-Based Program Manipulation (PEPM '08), pp. 41–50, ACM, New York, NY, USA, 2008.