A Survey Addressing On-Chip Interconnect: Energy and Reliability Considerations

Table 1

Comparison of on-chip interconnect techniques.

Process	𝑉DD	Length (mm)	Energy (fJ/bit/mm)	Bit rate (bps)	Line width (μm)	Density (Gbps/μm)	Transceiver area (μm^2)	Reference
Conventional full swing
180 nm	1.8 V	10	1100	1 G	1	1	NA	[14]
130 nm	1.2 V	2	310	2.3 G	1.6	1.44	NA	[18]
Low swing
180 nm	1.8 V	10	105	1 G	1.8	0.56	NA	[14]
180 nm	1.8 V	10	600	3 G	0.72	4.17	887	[16]
90 nm	1.2 V	10	28	2 G	1.4	1.42	379	[18]
90 nm	1.2 V	10	36.4	4 G	2	2	1760	[17]
65 nm	0.5 V–1 V	1	4.1–38.4	72 M–805 M	0.56	Varies	41	[23]
65 nm	0.35–1 V	1	8.4–136	5 M–622 M	0.56	Varies	234	[23]
Transmission line
180 nm	1.8 V	14	2000	3 G	24	0.13	NA	[24]
90 nm	1.0 V	10	105	8 G	14	0.57	2000	[27]
Radio frequency on transmission line
90 nm	Varies	18–90	150	30 G	12	2.5	5625	[28]
Optical
65 nm	NA	Varies	55	1280 G	4	320	NA	[29]

NA: not available.