Table of Contents
ISRN Electronics
Volume 2013, Article ID 476876, 8 pages
Research Article

A New 7-Level Symmetric Multilevel Inverter with Minimum Number of Switches

School of Electrical Engineering, VIT University, Vellore, Tamil nadu 632014, India

Received 3 June 2013; Accepted 9 July 2013

Academic Editors: T. L. Kunii and X. Yang

Copyright © 2013 S. Umashankar et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Though the multilevel inverters hold attractive features, usage of more switches in the conventional configuration poses a limitation to its wide range application. Therefore, a renewed 7-level multilevel inverter topology is introduced incorporating the least number of unidirectional switches and gate trigger circuitry, thereby ensuring the minimum switching losses, reducing size and installation cost. The new topology is well suited for drives and renewable energy applications. The performance quality in terms of THD and switching losses of the new MLI is compared with conventional cascaded MLI and other existing 7-level reduced switch topologies using carrier-based PWM techniques. The results are validated using MATLAB/SIMULINK.