A New MISO-Type Voltage-Mode Universal Biquad Using Single VD-DIBA

Abstract

A new multiple-input single-output-(MISO-)-type multifunction voltage-mode universal biquadratic filter employing single voltage differencing differential input buffered amplifier (VD-DIBA), two capacitors, and one resistor are proposed. The proposed structure can realize second-order low pass, high pass, band pass, band stop, and all pass filter responses without altering the circuit topology. The proposed new filter configuration also provides the following advantageous features, not available simultaneously in any of the single active device /element-based universal biquad in realizing all the five filter functions known earlier so far: (i) no requirement of any passive component(s) matching condition or inversion of input signal(s), (ii) independent electronic control of angular frequency (𝜔₀) and bandwidth (BW), and (iii) low active and passive sensitivities. SPICE simulation results have been included using 0.35 µm TSMC technology to confirm the validity of the proposed new universal biquadratic filter configuration.

1. Introduction

Several multiple-input single-output (MISO) or single-input multiple-output (SIMO) type current-mode (CM) or voltage-mode (VM) universal active filters have been described in the literature because of their flexibility and versatility for practical applications. Among these, MISO-type filters are particularly attractive because the same filter structure can be used for different filter functions. Recently, considerable attention has been devoted for the realization of VM or CM filter structures using different types of single active building block/device [1–9]. However, these filter configurations have the drawback of passive component-matching requirement(s) or inversion of input signal(s). Although the MISO-type filter configuration presented in [10] can realize all filter functions without component(s) matching or inversion of input signal(s), it employs no device (only (7+1) MOSFETs, two capacitors, and two resistors). VD-DIBA is one of the new active building blocks proposed in [11] and has been used in the realization of (i) first-order all-pass filter [12], (ii) simulated inductance circuits [13], and (iii) electronically controllable sinusoidal oscillator [14].

The purpose of this paper is, therefore, to propose a new MISO-type VM universal biquad employing a single VD-DIBA, two capacitors, and a resistor to realize (by appropriate selection of input signal voltage(s)) all the five standard filter functions, namely, low pass (LP), high pass (HP), band pass (BP), band stop (BS), and all pass (AP) without any passive component-matching requirement(s) or inversion of input signal(s) from the same circuit topology. The presented filter configuration also provides (i) independent electronic control of angular frequency (𝜔₀) and bandwidth (BW) and (ii) low active and passive sensitivities. The validity of the proposed biquad has been confirmed by SPICE simulations using 0.35 μm TSMC technology.

2. New Filter Configuration

The symbolic notation and behavioral model of the VD-DIBA (−) are shown in Figures 1(a) and 1(b), respectively. The model uses two controlled sources: the current source, controlled by differential voltage (𝑉₊−𝑉₋), with the transconductance 𝑔_𝑚, and the voltage source, controlled by differential voltage (𝑉_𝑣−𝑉_𝑧), with the unity voltage gain. The VD-DIBA [12] can be described by the following set of equations: 𝐼₊𝐼₋𝐼_𝑧𝐼_𝑣𝑉_𝑤=𝑔0000000000_𝑚−𝑔_𝑚𝑉0000000000−110⁺𝑉₋𝑉_𝑧𝑉_𝑣𝐼_𝑤. (1)

(a)

(b)

Figure 1 

(a) Symbolic notation, (b) behavioral model of VD-DIBA [12].

The proposed MISO-type voltage-mode universal biquadratic filter using single VD-DIBA, two capacitors, and a resistor are shown in Figure 2.

Figure 2 

The proposed MISO-type voltage-mode universal biquad.

A routine circuit analysis (assuming ideal VD-DIBA) of Figure 2 gives the following expression for the output voltage in terms of input voltages: 𝑉_𝑜=𝑉₁𝑠²−𝑉₃𝑠1/𝑅₀𝐶₂+𝑉₂𝑔_𝑚/𝑅₀𝐶₁𝐶₂𝑠²+𝑠1/𝑅₀𝐶₂+𝑔_𝑚/𝑅₀𝐶₁𝐶₂. (2)

From (2), various filter responses can be realized as(i)If 𝑉₁=𝑉₃=0 (grounded) and 𝑉₂=𝑉_in, a low pass filter can be realized as follows.(ii)If 𝑉₂=𝑉₃=0 and 𝑉₁=𝑉_in, a high pass filter can be realized.(iii)If 𝑉₁=𝑉₂=0 and 𝑉₃=𝑉_in, an inverting band pass filter can be realized.(iv)If 𝑉₃=0 and 𝑉₁=𝑉₂=𝑉_in, a band stop filter can be realized.(v)If 𝑉₁=𝑉₂=𝑉₃=𝑉_in, an all-pass filter can be realized.

The expressions for natural frequency (𝜔₀) and band width (BW) are given by 𝜔₀=𝑔_𝑚𝑅₀𝐶₁𝐶₂,1BW=𝑅₀𝐶₂. (3)

From (3), it can be observed that after adjusting BW, 𝜔₀ can independently be controlled electronically through the transconductance 𝑔_𝑚. Furthermore, it is seen that no passive component(s) matching or inversion of input signal(s) is required in any of the five filter realizations.

3. Nonideal Analysis and Sensitivity Performance

Considering the nonidealities of the VD-DIBA, let 𝑅_𝑍 and 𝐶_𝑍 denote the parasitic resistance and parasitic capacitance of the 𝑍-terminal and 𝑉_𝑊=(−𝛽⁺𝑉_𝑍+𝛽⁻𝑉_𝑉), where 𝛽⁺=(1−𝜀_𝑝), (𝜀_𝑝≪1), and 𝛽⁻=(1−𝜀_𝑛), (𝜀_𝑛≪1) denote the voltage tracking errors, respectively, then the output voltage in terms of inputs is given by 𝑉₀=𝑉₁𝑠²1+𝑠𝐶₁+𝐶_𝑧𝑅_𝑧−𝑉₃𝛽⁺𝐶₁𝐶₁+𝐶_𝑧𝑅₀𝐶₂𝑠+𝑉₂𝛽⁺𝑔_𝑚𝐶₁+𝐶_𝑧𝑅₀𝐶₂×𝑠²1+𝑠𝑅₀𝐶₂+1𝐶₁+𝐶_𝑧𝑅_𝑧+1𝐶₁+𝐶_𝑧𝐶₂𝑅₀𝑅_𝑧1+𝛽⁺𝑔_𝑚𝑅_𝑧⁻¹,𝜔₀=1+𝛽⁺𝑔_𝑚𝑅_𝑧𝐶₁+𝐶_𝑧𝐶₂𝑅₀𝑅_𝑧,𝑄₀=1+𝛽⁺𝑔_𝑚𝑅_𝑧𝐶₁+𝐶_𝑧𝐶₂𝑅₀𝑅_𝑧𝐶₁+𝐶_𝑧𝑅_𝑧+𝑅₀𝐶₂. (4)

Its active and passive sensitivities can be found as 𝑆^𝜔0_𝐶11=−2𝐶₁𝐶₁+𝐶_𝑧,𝑆^𝜔0_𝐶𝑧1=−2𝐶_𝑧𝐶₁+𝐶_𝑧,𝑆^𝜔0_𝐶21=−2=𝑆^𝜔0_𝑅0,𝑆^𝜔0_𝑅𝑧=𝑆^𝜔0_𝛽+=𝑆^𝜔0_𝑔𝑚=12𝛽⁺𝑔_𝑚𝑅_𝑧1+𝛽⁺𝑔_𝑚𝑅_𝑧,𝑆^𝑄0_𝑔𝑚=12𝛽⁺𝑔_𝑚𝑅_𝑧1+𝛽⁺𝑔_𝑚𝑅_𝑧=𝑆^𝑄0_𝛽+,𝑆^𝑄0_𝐶1=12𝐶₁𝐶₁+𝐶_𝑧𝑅₀𝐶₂−𝑅_𝑧𝐶₁+𝐶_𝑧𝑅₀𝐶₂+𝑅_𝑧𝐶₁+𝐶_𝑧,𝑆^𝑄0_𝐶21=−2𝑅₀𝐶₂−𝑅_𝑧𝐶₁+𝐶_𝑧𝑅₀𝐶₂+𝑅_𝑧𝐶₁+𝐶_𝑧=𝑆^𝑄0_𝑅0,𝑆^𝑄0_𝐶𝑧=12𝐶_𝑧𝐶₁+𝐶_𝑧𝑅₀𝐶₂−𝑅_𝑧𝐶₁+𝐶_𝑧𝑅₀𝐶₂+𝑅_𝑧𝐶₁+𝐶_𝑧,𝑆^𝑄0_𝑅𝑧=12𝑅₀𝐶₁+𝐶_𝑧𝐶²₂1+𝛽⁺𝑔_𝑚𝑅_𝑧−𝑅_𝑧𝐶₁+𝐶_𝑧𝑅₀𝐶₁+𝐶_𝑧𝐶₂1+𝛽⁺𝑔_𝑚𝑅_𝑧𝑅₀𝐶₂+𝑅_𝑧𝐶₁+𝐶_𝑧. (5)

From (5), it is clearly observed that all passive and active sensitivities are no more than one half in magnitudes for the proposed MISO-type VM universal biquad.

4. Simulation Results

To confirm workability of the proposed biquad filter, the circuit was simulated using CMOS VD-DIBA (as shown in Figure 3). For this purpose, the passive elements were selected as 𝐶₁=𝐶₂=0.01 nF, 𝑅₀=10.56 KΩ. The transconductance of VD-DIBA was controlled by bias voltage 𝑉_B1. The SPICE simulated frequency responses of the proposed biquad are shown in Figure 4. Figures 5 and 6 represent the phase and magnitude plots of APF, respectively. Thus, these simulation results confirm the validity of the proposed biquad filter. A comparison with other previously known single active element/device-based MISO-type VM universal biquads has been presented in Table 2.

Figure 3 

Proposed CMOS implementation of VD-DIBA, 𝑉DD=−𝑉SS=2V, 𝑉B1=1.4V, 𝑉B2=0.22, 𝑉B3=0.38V, and 𝑉B4=0.9V.

Figure 4 

Frequency response.

Figure 5 

Phase plot of APF.

Figure 6 

Frequency response of APF.

The CMOS VD-DIBA is implemented using 0.35 μm TSMC real transistors models which are listed in Box 1. Aspect ratios of transistors used in Figure 3 are given in Table 1.

Table 1 

Table 2 

Box 1 

5. Conclusions

A new second-order voltage-mode MISO-type universal biquad filter has been presented. The proposed configuration employs single VD-DIBA, two capacitors, and one resistor. The presented biquad (by proper selection of input voltages) can yield second-order low pass, high pass, band pass, notch and all pass-filter responses without altering the circuit topology. The proposed filter configuration also provides the following advantages which are not available simultaneously in any of the single active device/element-based universal MISO-type VM biquads realizing all the five filter functions: (i) no requirement of any passive component(s) matching condition or inversion of input signal(s), (ii) independent electronic control of angular frequency (𝜔₀) and bandwidth (BW), and (iii) low active and passive sensitivities. Simulation results using 0.35 μm TSMC technology have been included to confirm the feasibility of the new proposed biquad filter.