A new electronically tunable differential integrator (ETDI) and its extension to voltage controlled quadrature oscillator (VCQO) design with linear tuning law are proposed; the active building block is a composite current feedback amplifier with recent multiplication mode current conveyor (MMCC) element. Recently utilization of two different kinds of active devices to form a composite building block is being considered since it yields a superior functional element suitable for improved quality circuit design. The integrator time constant and the oscillation frequency are tunable by the control voltage of the MMCC block. Analysis indicates negligible phase error for the integrator and low active -sensitivity relative to the device parasitic capacitances. Satisfactory experimental verifications on electronic tunability of some wave shaping applications by the integrator and a double-integrator feedback loop (DIFL) based sinusoid oscillator with linear variation range of 60 KHz~1.8 MHz at low THD of 2.1% are verified by both simulation and hardware tests.

1. Introduction

Dual-input integrators with electronic tunability are useful functional components for numerous analog signal processing and waveforming applications [1]. A number of single and dual-input passive tuned integrators using various active building blocks are available [2, 3].

However, integrators with electronically adjustable time constant find some exclusive applications [46], for example, in electronically tunable biquadratic phase selective filter design [7], as electronic reset controller and phase compensator [8] for process control loops.

Quadrature sinusoid oscillators are widely used in orthogonal signal mixers, in PLLs and SSB modulators; some such oscillators based on various active devices, for example, voltage operational amplifier-VOA [9], CFOA [10, 11], CDBA [12, 13], CDTA [14], DDCC [15], CCCCTA [16], OTA [17], and DVCCTA [18, 19], are reported.

Here we present a simple electronically tunable dual-input integrator (ETDI) topology based on a composite current feedback amplifier- (CFA-) multiplication mode current conveyor (MMCC) building block. It has been pointed out in the recent literature [20, 21] that utilization of two different kinds of active elements to form a composite building block yields superior functional result in analog signal processing applications.

Hence the topic of quadrature sinusoidal oscillator design and implementation with better quality is receiving considerable research interest at present. A number of such oscillators using various active building blocks [917] are now available. Here, we present a new simple ETDI topology, based on a composite CFA-MMCC building block with grounded capacitor; subsequently, a double-integrator feedback loop (DIFL), with one inverting and the other noninverting, is utilized to design a linear VCQO wherein a pair of grounded -section selects the appropriate signal generation band and the control voltage of the MMCC tunes oscillation frequency linearly; no component matching constraint is involved here. This current conveyor element is quite an elegant building block with a dedicated control voltage terminal; hence the MMCC is a versatile active component suitable for electronically tunable function circuit design.

It is seen in recent literature that such linear VCQO is a useful functional block which finds wide range of applications in emerging fields; namely, in certain telemetry-related areas it could convert a transducer voltage to a proportional frequency which is then modulated for subsequent processing [22], as quantizer for frequency-to-digital or time-to-digital conversion [23] and also as the spectrum monitor receiver [24] in cognitive radio communication studies.

Here, we present the design and realization of a new linear VCQO using the composite type active device; analysis shows that device imperfections, namely, port tracking errors and parasitic capacitors at current source nodes, yield negligible effects on the nominal design, whereby the active-sensitivity figures are extremely low. Experimental measurements by simulation and hardware tests on the proposed design indicate satisfactory results with -tunability in the range 60 KHz–1.8 MHz following the variation of a suitable control voltage wherein a desired band-spread may be selected by appropriate choice of the grounded components [25], without any component matching constraint, even with nonideal devices.

2. Analysis

The ETDI topology is shown in Figure 1(a); the nodal relations of the active blocks are , , , and   for the CFA and , , , and for the MMCC where is multiplication constant [12] and is control voltage. The port transfer ratios (, , and ) are unity for ideal elements; the imperfections may be postulated in terms of some small error coefficients as , , and . Also, shunt- parasitic components appear [2628] at the -node of the blocks having typical values in the range of and ; since resistance values used in the design are in KΩ ranges, their ratios to are extremely small and hence effects of are negligible in the design. It may also be mentioned that a low-value internal parasitic resistance appears in series with the current path at -node of the devices; its effect can be minimized by absorbing -value in the load resistors at these nodes. Routine analysis assuming yields the open-loop transfer in Figure 1(a) aswhere

It may be seen that effect of may be compensated by absorbing its value in since both are grounded [25], an attractive feature for microminiaturization. The noninverting input signal is also slightly altered; in practice, however, the deviation is quite negligible as we observed during the experimental verification.

The port errors alter the magnitude response slightly by a factor ; however, a phase error is introduced at relatively higher side of frequency , given by . Since , ; that is, ; typical values [27] indicate that if , then  MHz with  KΩ (typical) which yields at 2.5 MHz around the nominal phase of . The quality factor of the integrator is derived as .

Hence, it is seen that the effects of device nonidealities are quite negligible; assuming therefore that and for simplicity, we get the desired ETDI transfer from (1) as

3. Linear VCQO Design

The proposed oscillator is designed with DIFL using the block diagram of Figure 1(b); neglecting port errors in (1), we get the loop-gain of the DIFL, assuming and , asThe MMCC block is shown in Figure 1(c).

Total phase shift of loop-gain is

The parasitic phase components are extremely low since the lossy capacitors create distant pole frequencies compared to the usable frequency range; hence the input and output stimulus of the DIFL would be in same phase at unity gain and closure of loop incites sinusoid oscillations build-up; the corresponding characteristic equation iswhich yields the oscillation frequency after putting , as

With equal-value components and = 0.1/volt, (7) yields ; thus linear tunability of is obtained by directly applying the control voltage of MMCC unit. No additional to current conversion circuitry as compared to previous realizations using OTA [14, 17] is required. The active -sensitivity is calculated as . The frequency-stability is derived as , using the relation where .

4. Experimental Results

The proposed ETDI of Figure 1(a) is built with readily available ADF-844/846 type CFA device [28, 29]; since MMCC [30]-chip is not yet commercially available, we configured it [12, 31] as shown in Figure 1(d), with four-quadrant multiplier (ICL-8013 or AD-534) coupled with a current feedback amplifier (CFA) device (AD-844 or AD-846). The bandwidth of the CFA device is almost independent of the closed loop-gain at high slew rate values [28, 29]. This yields the element to be particularly advantageous for various signal processing/generation applications. Recently, reports on superior versions of the CFA element (OPA-695) have appeared [32] indicating very high slew rate (~2.5 KV/μs) and extended bandwidth (~1.4 GHz).

For the linear VCQO design, we formed the block diagram of Figure 1(b) using one inverting and another noninverting ETDI. The measured responses obtained by simulation and hardware tests are shown in Figure 2; linear to variation characteristics had been verified with which provided a satisfactory tuning range of up to about 1.8 MHz with appropriate choice of products.

Practical design responses of proposed circuits have been verified with both ICL-8013 and AD-534 type as multiplier elements, along with both AD-844 and AD-846 type CFA devices; satisfactory results with both sets of components had been verified. A comparative summary of some recent quadrature oscillator characteristics is described in Table 2.

5. Some Discussions

Keeping in view the measured responses, a few observations are presented here on functional unit to unit basis; this substantiates the accuracy and versatility of the proposed realization.

ETDI(a)Voltage controlled time constant, either enhancement or tapering adjustment at dual input feature with grounded capacitor; typical time domain response shown in Figure 2(a) verifies the features.(b)With sinusoid signals, 20 dB/decade frequency roll-off had been observed at 3.3 MHz onwards; measured CMRR ≈ 57 dB at .(c)Frequency domain phase error is measured as at 2 MHz; adjustment of for control did not affect this error. Also the ETDI is practically active-insensitive to port mismatch errors [28, 33].

CFA-MMCC(a)Availability of in-built control voltage node of MMCC adds flexibility to a designer; this feature is verified experimentally by generating a quadrature (integrated) wave modulation response as shown in Figure 2(f). This is a useful application of the CFA-MMCC based ETDI.(b)Analysis shows that is dominantly caused by parasitic of CFA device; another component of this error due to MMCC is negligible since as .Thus the overall phase error of could be limited to extremely low values for frequencies , after selecting moderate values of , while may be tuned by ; these two adjustments are noninteracting.

This substantiates the versatility of selecting a composite building block. Phase error had been measured as in Table 1, with  KΩ and  pF (measured); that is,  MHz.

DIFL(a)Two identical stages, with a common terminal, are cascaded for DIFL topology having nominal phase output of 180°. Tested phase response compounded as at 2 MHz. Loop was observed to be unable to build up oscillation beyond 2 MHz. Therefore parasitic elements tend to limit the usable range of  MHz.

VCQO(a)Literature shows that albeit some quadrature oscillators were presented earlier, very few [10, 17] provide electronically tunable linear tuning law. These designs are based on electronic tuning by a bias current () that is replicated from which requires additional current processing circuitry/hardware consuming extra quiescent power; moreover such -to- conversion involves thermal voltage [18] and hence temperature sensitivity issues. In view of these comparative attributes, the proposed design appears to be superior.

6. Conclusion

The realization and analysis of a new ETDI and its applicability to the design of linear VCQO using the CFA-MMCC composite building block are presented.

The effects of the device imperfections are examined which are seen to be quite negligible as indicated by low phase and magnitude deviations. The linear -to- tuning characteristics had been experimentally verified in a range of 60 KHz–1.8 MHz with good quality low distortion sine-wave generation response. It may be mentioned that here the linear tuning feature is obtained by the simple and direct application of the same control voltage () to the appropriate terminal of the MMCC building blocks for the two ETDI stages. Additional current processing circuitry for –to- bias current () conversion and its associated hardware complexity with additional quiescent power requirement would not be needed as compared to previous OTA based electronically tunable realizations; moreover, this conversion involves thermal voltage () that may ensue temperature sensitivity issue [18]. Also, use of the superior quality devices [28, 32] in the proposed topology is believed to exhibit low distortion generation at extended range of frequencies. A comparative study of similar designs, presented in a concise table, indicates the superiority of the proposed implementation.

As further study, we plan to utilize the linear VCQO for some cognitive radio spectrum assessment applications after translating the proposed design using suitable building blocks with appropriate high frequency specification.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.


The first author (Rabindranath Nandi) wishes to acknowledge the project-support extended by the All India Council for Technical Education, Government of India, for the work through the Research Promotion Scheme.