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Journal of Optimization
Volume 2017, Article ID 8624021, 11 pages
https://doi.org/10.1155/2017/8624021
Research Article

Power and Execution Time Optimization through Hardware Software Partitioning Algorithm for Core Based Embedded System

1Laboratory of Electronic and Microelectronic, Faculty of Sciences at Monastir, University of Monastir, 5000 Monastir, Tunisia
2Networked Objects Control & Communication Systems Laboratory, National Engineering School of Sousse, BP 264, Sousse Erriadh, 4023 Sousse, Tunisia

Correspondence should be addressed to Siwar Ben Haj Hassine; moc.liamg@enissah.jah.rawis

Received 18 August 2016; Revised 8 January 2017; Accepted 24 January 2017; Published 19 February 2017

Academic Editor: Manlio Gaudioso

Copyright © 2017 Siwar Ben Haj Hassine et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [4 citations]

The following is the list of published articles that have cited the current article.

  • Rodolfo Labiapari Mansur Guimaraes, and Ricardo Augusto Rabelo Oliveira, “An Approach of Hardware and Software Partitioning for the Wearables Design with Limited Reconfigurable Hardware Resources,” 2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC), pp. 91–98, . View at Publisher · View at Google Scholar
  • Lilia Kechiche, Lamjed Touil, and Bouraoui Ouni, “Toward the Implementation of an ASIC-Like System on FPGA for Real-Time Video Processing with Power Reduction,” International Journal of Reconfigurable Computing, vol. 2018, pp. 1–11, 2018. View at Publisher · View at Google Scholar
  • Mehdi Jemai, Siwar Ben Haj Hassine, Bouraoui Ouni, and Abdellatif Mtibaa, “Optimization of Dynamic Power for System on Programmable Chip SOPC,” Handbook of Research on Power and Energy System Optimization, pp. 571–600, 2018. View at Publisher · View at Google Scholar
  • Neng Hou, Fazhi He, Yi Zhou, Yilin Chen, and Xiaohu Yan, “A Parallel Genetic Algorithm With Dispersion Correction for HW/SW Partitioning on Multi-Core CPU and Many-Core GPU,” IEEE Access, vol. 6, pp. 883–898, 2018. View at Publisher · View at Google Scholar