VLSI Design

VLSI Design / 1995 / Article

Open Access

Volume 3 |Article ID 076861 | https://doi.org/10.1155/1995/76861

Uwe Vehlies, "Stepwise Transformation of Algorithms into Array Processor Architectures by the DECOMP", VLSI Design, vol. 3, Article ID 076861, 14 pages, 1995. https://doi.org/10.1155/1995/76861

Stepwise Transformation of Algorithms into Array Processor Architectures by the DECOMP

Received12 May 1993
Accepted01 Jan 1994

Abstract

A formal approach for the transformation of computation intensive digital signal processing algorithms into suitable array processor architectures is presented. It covers the complete design flow from algorithmic specifications in a high-level programming language to architecture descriptions in a hardware description language. The transformation itself is divided into manageable design steps and implemented in the CAD-tool DECOMP which allows the exploration of different architectures in a short time. With the presented approach data independent algorithms can be mapped onto array processor architectures. To allow this, a known mapping methodology for array processor design is extended to handle inhomogeneous dependence graphs with nonregular data dependences. The implementation of the formal approach in the DECOMP is an important step towards design automation for massively parallel systems.

Copyright © 1995 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


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