VLSI Design

VLSI Design / 1998 / Article

Open Access

Volume 6 |Article ID 019402 | https://doi.org/10.1155/1998/19402

Robert W. Dutton, Edwin C. Kan, "Hierarchical Process Simulation for Nano-Electronics", VLSI Design, vol. 6, Article ID 019402, 7 pages, 1998. https://doi.org/10.1155/1998/19402

Hierarchical Process Simulation for Nano-Electronics

Abstract

The challenges of computational electronics are considered from the perspective of process simulation. Essential limitations for device scaling posed from a technology point of view are discussed along with many new research opportunities. The key areas considered include: bulk processing, interconnect technology and software engineering for computational electronics.

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


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