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VLSI Design
Volume 5 (1998), Issue 4, Pages 333-345
http://dx.doi.org/10.1155/1998/20389

Self-Checking Combinational Circuits with Unidirectionally Independent Outputs

1Department of Computer Science, Fault-Tolerant Group at the University Potsdam, P.O. Box 601553, Potsdam 14415, Germany
2Railway-Transportation University of St. Petersburg, Pr. Moskovskij 9, Sankt-Petersburg, Russia

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [4 citations]

The following is the list of published articles that have cited the current article.

  • D. V. Efanov, V. V. Sapozhnikov, and Vl. V. Sapozhnikov, “Applications of modular summation codes to concurrent error detection systems for combinational boolean circuits,” Automation and Remote Control, vol. 76, no. 10, pp. 1834–1848, 2015. View at Publisher · View at Google Scholar
  • Efanov, Malikov, and Groshev, “Ways to set up a concurrent error detection system for logical circuits without memory,” Russian Electrical Engineering, vol. 87, no. 5, pp. 286–288, 2016. View at Publisher · View at Google Scholar
  • D. V. Efanov, V. V. Sapozhnikov, and Vl. V. Sapozhnikov, “Conditions for detecting a logical element fault in a combination device under concurrent checking based on Berger’s code,” Automation and Remote Control, vol. 78, no. 5, pp. 891–901, 2017. View at Publisher · View at Google Scholar
  • V. V. Dmitriev, D. V. Efanov, V. V. Sapozhnikov, and Vl. V. Sapozhnikov, “Sum Codes with Efficient Detection of Twofold Errors for Organization of Concurrent Error-Detection Systems of Logical Devices,” Automation and Remote Control, vol. 79, no. 4, pp. 665–678, 2018. View at Publisher · View at Google Scholar