VLSI Design

VLSI Design / 1998 / Article
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VLSI Design On Self-Checking Systems

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Volume 5 |Article ID 028524 | https://doi.org/10.1155/1998/28524

F. S. Vainstein, "Self Checking Design Technique for Numerical Computations", VLSI Design, vol. 5, Article ID 028524, 8 pages, 1998. https://doi.org/10.1155/1998/28524

Self Checking Design Technique for Numerical Computations


The objective of this paper is to develop an efficient method for testing of numerical computations based on algebraic concepts such as transcendental degree of field extensions.A class of polynomially checkable functions is introduced, and for computation of the functions from this class a new method for error detection/error correction is proposed. This class of functions is shown to be large. The proposed method can also be extended to testing of computations of functions which are not polynomially checkable.The preliminary results show great potential of this approach. In particular the proposed approach will lead to substantial reduction in hardware overhead required for multiple error detection and correction, as compare to the check sum method and other existing techniques.

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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