VLSI Design

VLSI Design / 1998 / Article

Open Access

Volume 7 |Article ID 091849 | https://doi.org/10.1155/1998/91849

I. Andreadis, I. Kokolakis, A. Gasteratos, Ph. Tsalides, "A Stochastic D/A Converter Based on a Cellular Automaton Architecture", VLSI Design, vol. 7, Article ID 091849, 8 pages, 1998. https://doi.org/10.1155/1998/91849

A Stochastic D/A Converter Based on a Cellular Automaton Architecture

Received22 Feb 1997

Abstract

The design and VLSI implementation of a new stochastic D/A converter using the properties of Cellular Automata (CA) is presented in this paper. The converter is implemented using a Double Layer Metal (DLM), 0.7 μm, N-well, CMOS technology process provided by the European Silicon Structures (ES2). Its maximum conversion rate is 6 kHz and it is intended to be used in low-cost applications. Additionally, the proposed approach integrates into digital techniques more easily than other popular building D/A techniques.

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


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