Table of Contents
VLSI Design
Volume 7, Issue 2, Pages 203-210

A Stochastic D/A Converter Based on a Cellular Automaton Architecture

Laboratory of Electronics, Section of Electronics and Information Systems Technology, Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi 67100, Greece

Received 22 February 1997

Copyright © 1998 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


The design and VLSI implementation of a new stochastic D/A converter using the properties of Cellular Automata (CA) is presented in this paper. The converter is implemented using a Double Layer Metal (DLM), 0.7 μm, N-well, CMOS technology process provided by the European Silicon Structures (ES2). Its maximum conversion rate is 6 kHz and it is intended to be used in low-cost applications. Additionally, the proposed approach integrates into digital techniques more easily than other popular building D/A techniques.