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VLSI Design
Volume 9, Issue 2, Pages 181-201
http://dx.doi.org/10.1155/1999/95465

Abstract Architecture Representation Using VSPEC

Department of Electrical and Computer Engineering and Computer Science, The University of Cincinnati, Cincinnati, OH, USA

Received 10 March 1996; Revised 2 April 1997

Copyright © 1999 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [3 citations]

The following is the list of published articles that have cited the current article.

  • M. Rangarajan, P. Alexander, and N.B. Abu-Ghazaleh, “Using automatable proof obligations for component-based design checking,” Proceedings ECBS'99. IEEE Conference and Workshop on Engineering of Computer-Based Systems, pp. 304–310, . View at Publisher · View at Google Scholar
  • P Alexander, M Rangarajan, and P Baraona, “A brief summary of VSPEC,” Fm'99-Formal Methods, Vol Ii, vol. 1709, pp. 1068–1086, 1999. View at Publisher · View at Google Scholar
  • R.S. Janka, L.M. Wills, and L.B. Baumstark, “Virtual benchmarking and model continuity in prototyping embedded multiprocessor signal processing systems,” IEEE Transactions on Software Engineering, vol. 28, no. 9, pp. 832–846, 2002. View at Publisher · View at Google Scholar