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VLSI Design
Volume 14, Issue 2, Pages 183-191
http://dx.doi.org/10.1080/10655140290010097

A Parallel Residue-to-binary Converter for the Moduli Set {2m1,220m+1,221m+1,,22km+1}

1Department of Electrical and Computer Engineering, Centre for Signal Processing and Communications, Concordia University, 1455 de Maisonneuve Blvd. West, Montreal, Que. H3G 1M8, Canada
2Department of Computer Science, University of Texas at Dallas, Richardson, TX 75083-0688, USA

Received 13 January 2000; Revised 9 March 2000

Copyright © 2002 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Wei Wang, M. N. S. Swamy, M. O. Ahmad, and Yuke Wang, “A Parallel Residue-to-binary Converter for the Moduli Set ,” VLSI Design, vol. 14, no. 2, pp. 183-191, 2002. https://doi.org/10.1080/10655140290010097.