Table of Contents
VLSI Design
Volume 14, Issue 1, Pages 107-122
http://dx.doi.org/10.1080/10655140290009837

Term Trees in Application to an Effective and Efficient ATPG for AND–EXOR and AND–OR Circuits

1Faculty of Electrical Engineering, Eindhoven University of Technology, P.O. Box 513 EH 10.25, Eindhoven 5600, MB, The Netherlands
2Department of Electrical and Computer Engineering, Portland State University, Portland 97207, OR, USA

Received 20 January 2000; Revised 4 October 2000

Copyright © 2002 Hindawi Publishing Corporation. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Lech Jóźwiak, Aleksander Ślusarczyk, and Marek Perkowski, “Term Trees in Application to an Effective and Efficient ATPG for AND–EXOR and AND–OR Circuits,” VLSI Design, vol. 14, no. 1, pp. 107-122, 2002. https://doi.org/10.1080/10655140290009837.