VLSI Design

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Volume 2007 |Article ID 046514 | https://doi.org/10.1155/2007/46514

Ethiopia Nigussie, Teijo Lehtonen, Sampo Tuuna, Juha Plosila, Jouni Isoaho, "High-Performance Long NoC Link Using Delay-Insensitive Current-Mode Signaling", VLSI Design, vol. 2007, Article ID 046514, 13 pages, 2007. https://doi.org/10.1155/2007/46514

High-Performance Long NoC Link Using Delay-Insensitive Current-Mode Signaling

Academic Editor: Maurizio Palesi
Received01 Nov 2006
Revised24 Jan 2007
Accepted01 Mar 2007
Published30 Apr 2007


High-performance long-range NoC link enables efficient implementation of network-on-chip topologies which inherently require high-performance long-distance point-to-point communication such as torus and fat-tree structures. In addition, the performance of other topologies, such as mesh, can be improved by using high-performance link between few selected remote nodes. We presented novel implementation of high-performance long-range NoC link based on multilevel current-mode signaling and delay-insensitive two-phase 1-of-4 encoding. Current-mode signaling reduces the communication latency of long wires significantly compared to voltage-mode signaling, making it possible to achieve high throughput without pipelining and/or using repeaters. The performance of the proposed multilevel current-mode interconnect is analyzed and compared with two reference voltage mode interconnects. These two reference interconnects are designed using two-phase 1-of-4 encoded voltage-mode signaling, one with pipeline stages and the other using optimal repeater insertion. The proposed multilevel current-mode interconnect achieves higher throughput and lower latency than the two reference interconnects. Its throughput at 8 mm wire length is 1.222 GWord/s which is 1.58 and 1.89 times higher than the pipelined and optimal repeater insertion interconnects, respectively. Furthermore, its power consumption is less than the optimal repeater insertion voltage-mode interconnect, at 10 mm wire length its power consumption is 0.75 mW while the reference repeater insertion interconnect is 1.066 mW. The effect of crosstalk is analyzed using four-bit parallel data transfer with the best-case and worst-case switching patterns and a transmission line model which has both capacitive coupling and inductive coupling.


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Copyright © 2007 Ethiopia Nigussie et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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