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VLSI Design
Volume 2008 (2008), Article ID 218565, 8 pages
Research Article

Delay Efficient 32-Bit Carry-Skip Adder

Department of Electrical and Computer Engineering, State University of New York, 1 Hawk Dr, New Paltz, NY 12561-2443, USA

Received 27 April 2007; Accepted 9 December 2007

Academic Editor: Jean-Baptiste Begueret

Copyright © 2008 Yu Shen Lin and Damu Radhakrishnan. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Yu Shen Lin and Damu Radhakrishnan, “Delay Efficient 32-Bit Carry-Skip Adder,” VLSI Design, vol. 2008, Article ID 218565, 8 pages, 2008. doi:10.1155/2008/218565