Journals
Publish with us
Publishing partnerships
About us
Blog
VLSI Design
Table of Contents
Special Issues
VLSI Design
/
2008
/
Article
/
Tab 1
/
Research Article
Delay Efficient 32-Bit Carry-Skip Adder
Table 1
Maximum size of adders.
Target delay (
𝑇
)-time units
4
5
6
7
8
Adder size (
𝑛
)-bits
9
22
54
119
237