Journals
Publish with us
Publishing partnerships
About us
Blog
VLSI Design
Table of Contents
Special Issues
VLSI Design
/
2008
/
Article
/
Tab 2
/
Research Article
Delay Efficient 32-Bit Carry-Skip Adder
Table 2
Cell Characteristics.
Delay (ns)
Average power (mw)
AOI3
0.267
0.128
OAI3
0.264
0.127
AOI5
0.527
0.15
OAI5
0.541
0.16
AOI7
0.578
0.33
OAI7
0.579
0.30
FA
0.604
0.34