A Robust Low-Voltage On-Chip LDO Voltage  Regulator in 180 nm

<table class="table-group" width="800px"><tr class="fig-image" id="a"><td><img alt="259281.fig.011a" src="https://static.hindawi.com/articles/vlsi/volume-2008/259281/figures/259281.fig.011a.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(a) </b> Band gap reference output voltage variation with temperature</td></tr></table></td></tr><tr class="fig-image" id="b"><td><img alt="259281.fig.011b" src="https://static.hindawi.com/articles/vlsi/volume-2008/259281/figures/259281.fig.011b.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(b) </b> PSRR of the LDO regulator proposed</td></tr></table></td></tr></table>

VLSI Design

fig11

Figure 11

Figure 11: A Robust Low-Voltage On-Chip LDO Voltage  Regulator in 180 nm 