A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm

Table 2

Performance measures of the proposed simulated LDO at various process corners.

Process corner	Overshoot mV	Undershoot mV	Settling time (𝜇s)	Line regulation %	Load regulation Ppm/mA
TT	93	86	13.1	.08	32
FF	111	83	12.4	.08	48
SS	80	85	13	.56	32
SNFP	86	82	12.2	.16	32
FNSP	102	89	13.2	.08	16