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VLSI Design
Volume 2008 (2008), Article ID 610420, 9 pages
http://dx.doi.org/10.1155/2008/610420
Research Article

An FFT Core for DVB-T/DVB-H Receivers

Department of Electronic and Communication, CEIT and Tecnun, University of Navarra, 20018 Donostia-San Sebastian, Spain

Received 27 April 2007; Revised 15 November 2007; Accepted 23 January 2008

Academic Editor: Jean-Baptiste Begueret

Copyright © 2008 A. Cortés et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Citations to this Article [5 citations]

The following is the list of published articles that have cited the current article.

  • Turrillas, Cortés, Vêlez, Sevillano, and Irizar, “An FFT core for DVB-T2 receivers,” 2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009, pp. 120–123, 2009. View at Publisher · View at Google Scholar
  • Víctor Montanño, and Manuel Jiménez, “Design and implementation of a scalable floating-point FFT IP core for Xilinx FPGAs,” Midwest Symposium on Circuits and Systems, pp. 533–536, 2010. View at Publisher · View at Google Scholar
  • M. Turrillas, A. Cortés, I. Vélez, J.F. Sevillano, and A. Irizar, “An area-efficient Radix 28 FFT algorithm for DVB-T2 receivers,” Microelectronics Journal, 2013. View at Publisher · View at Google Scholar
  • Mehdi Ayat, Hossein Hardani, Sattar Mirzakuchaki, and Farzan Haddadi, “Design and implementation of high throughput FPGA-based DVB-T system,” Computers & Electrical Engineering, vol. 51, pp. 43–57, 2016. View at Publisher · View at Google Scholar
  • Amit Kumar Mishra, and Sesham Srinu, “Cooperative sensing based on permutation entropy with adaptive thresholding technique for cognitive radio networks,” IET Science, Measurement and Technology, vol. 10, no. 8, pp. 934–942, 2016. View at Publisher · View at Google Scholar