VLSI Design

VLSI Design / 2008 / Article / Tab 5

Research Article

High-Performance Timing-Driven Rank Filter

Table 5

Operating frequency and resource requirements using Virtex-4.

Configuration3×3/15×5/17×7/17×7/2

FFs594108820682879
LUTs40695017923164
BRAMs6121818
F C L K m a x 400375355300