Floorplan-Driven Multivoltage High-Level Synthesis

Table 1

Benchmarks and constraints for testing FloM.

Benchmark	Number of MULT	Number of ALU	Latency
EWF	1	3	25
IIR	2	1	16
DCT	2	3	25
DiffEq	2	1	10
FDCT	2	3	25
FIR	2	2	20
TFIR	2	2	15
Lattice	2	1	20