VLSI Design

VLSI Design / 2009 / Article / Tab 1

Review Article

Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications

Table 1

Device-and circuit-level implications due to changing channel doping profile for subthreshold operation [9].

ParameterStandard deviceOptimized device

S (mv/decade)9083
(F/ m)4.9 10−163.2 10−16
PDP(J)@ = 200 mv5.5 10−162.8 10−16

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