Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications

Table 3

Using optimum under lap [14].

S.NO.	Parameter	Effect compared with overlap DGMOS
(1)	delay	40% improvement
(2)	Effective 𝐶g	Reduced by 8×
(3)	energy	Less by 6.2×
(4)	Frequency	1.2 GHz
(5)	PDP	7.3× reduction