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VLSI Design
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2009
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Article
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Tab 2
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Research Article
Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management
Table 2
Number of slices of the router with WF routing on a Virtex2 FPGA device.
Flit size
FB depth = 4
FB depth = 8
Overhead
16 + 6 bits
2809
3662
30.37%
24 + 6 bits
3136
4380
39.67%
32 + 6 bits
3468
5009
44.43%