A Methodology for Generation of Performance Models for the Sizing of Analog High-Level Topologies

Table 5

GA technique using hold-out method.

Model	𝜎^2	𝛾	ARE (%)		𝑅		𝑇tr
			Training	Test	Training	Test	(min)
𝜌1	2.38	250.13	2.16	3.38	0.999	0.998	12.06
𝜌2	5.62	480.19	2.12	3.82	0.994	0.961	10.83
𝜌3	5.19	140.15	1.98	2.90	0.999	0.998	11.56