Research Article

Finding the Energy Efficient Curve: Gate Sizing for Minimum Power under Delay Constraints

Figure 1

Energy efficient curve. Although implementations 0 and 0′ of the given circuit have the same delay ( 𝐷 0 ), implementation 0 consumes less energy. Similarly, implementations 1 and 1′ consume the same energy, but implementation 1 has a shorter delay ( 𝐷 1 ), hence is preferable. Points 0 and 1 are on the energy efficient curve. All implementations have the same circuit topology, with different device sizes.
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