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VLSI Design
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2013
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Article
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Tab 3
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Research Article
Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL
Table 3
Transistor count comparison of full adders.
Logic style
No. of transistors
Conventional CMOS
28
Double pass transistor logic (DPL)
48
DPTAAL full adder design
65*
DPTAAL is 35% larger than DPL.