Verification of Mixed-Signal Systems with Affine Arithmetic Assertions

<table>Simulation results. The stability margin of the control system <svg height="15.4" id="M289" style="vertical-align:-3.3907pt" version="1.1" viewbox="0 0 22.5625 15.4" width="22.5625" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
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</svg> and the room temperature <svg height="16.450001" id="M290" style="vertical-align:-3.3907pt" version="1.1" viewbox="0 0 14.2375 16.450001" width="14.2375" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
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</svg>.</table>

VLSI Design

fig11

Figure 11

Figure 11: Verification of Mixed-Signal Systems with Affine Arithmetic Assertions 