Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAs

<table><tr><td><table class="algorithm" id="alg5"><tr><td colspan="2"><i>GPRM </i></td></tr><tr><td colspan="2"><i> </i>(1)<i> </i>Create Dag</td></tr><tr><td colspan="2"><i> </i>(2)<i> </i>Compute Reconfiguration Cost for each Dag edge</td></tr><tr><td colspan="2"><i> </i>(3)<i> </i>Compute Least Cost Source-Sink Path in Dag</td></tr><tr><td colspan="2"><b>end </b></td></tr></table></td></tr></table>

VLSI Design

alg5

Algorithm 5

Algorithm 5: Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAs 