Framework for Simulation of Heterogeneous MpSoC for Design Space Exploration

Algorithm 1

Pseudocode for the performance driven (PD) scheduling and HWD mapping algorithms.

for each task in ATG do{

//set the longest-path-maximum-delay deadline

setDeadline();

//initial solution

task.random_mapToPE(); }

while simulation temp > cooling_threshold

do{

for temperature length{

for task_sub_iteration_length{

while each task is assigned a release time{

//generates the RTW w/ Comm. cost

genRTL();

//rand task from RTL

t_sch = sel_rand(RTL);

//generate release time window

t_sch.genRTW();

//set rel time

t_sch.rel_time = sel_rand(RTW); }

//init and run systemC simulation

sc_start(time);

//calculating objective function value

calcObjFunc();

//accepts or rejects a solution

probFunc();}

for each task in ATG do{

//calculate workload of processors

task.calc_HWDcost();

//new mapping solution

task.HWD_mapToPE();  }

}

//calculate new simulation temperature

calc_simulation_temp();

}